Intel 87C196CB ユーザーズマニュアル

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CAN SERIAL COMMUNICATIONS CONTROLLER
7.5.3
Programming the Message Object Control Registers
Each message object control register consists of four bit pairs — one bit of each pair is in true
form and one is in complement form. This format allows software to set or clear any bit with a
single write operation, without affecting the remaining bits. Table 7-12 shows how to interpret
the bit-pair values.
7.5.3.1
Message Object Control Register 0
Message object control register 0 (Figure 7-14) indicates whether an interrupt is pending, controls
whether a successful transmission or reception generates an interrupt, and indicates whether a
message object is ready to transmit.
7.5.3.2
Message Object Control Register 1
Message object control register 1 (Figure 7-15) indicates whether the message object contains
new data, whether a message has been overwritten, whether the message is being updated, and
whether a transmission or reception is pending. Message objects 1–14 have only a single buffer,
so if a second message is received before the CPU reads the first, the first message is overwritten.
Message object 15 has two alternating buffers, so it can receive a second message while the first
is being processed. However, if a third message is received while the CPU is reading the first, the
second message is overwritten. 
7.5.4
Programming the Message Object Data
Each message object can have from zero to eight bytes of data. For transmit message objects,
write the message data to the data registers (Figure 7-16). For receive message objects, the CAN
controller stores the received data in these registers. The CAN controller writes random values to
any unused data bytes during operation, so you should not use unused data bytes as scratch-pad
memory.
Table 7-12.  Control Register Bit-pair Interpretation
Access Type
MSB
LSB
Definition
Write
0
0
Not allowed (indeterminate)
0
1
Clear (0)
1
0
Set (1)
1
1
No change
Read
0
1
Clear (0)
1
0
Set (1)