Freescale Semiconductor MPC5200B ユーザーズマニュアル
MPC5200B Users Guide, Rev. 1
15-4
Freescale Semiconductor
PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
•
Selectable pulse width: either 3/16 bit duration or 1.6
µs
IrDA MIR mode:
•
Baud rate: 0.576 Mbps to 1.152 Mbps
IrDA FIR mode:
•
Baud rate: 4 Mbps
15.2
PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
The PSCs are located at an address as indicated below:
•
PSC1 BASE = MBAR + 0x2000
•
PSC2 BASE = MBAR + 0x2200
•
PSC3 BASE = MBAR + 0x2400
•
PSC4 BASE = MBAR + 0x2600
•
PSC5 BASE = MBAR + 0x2800
•
PSC6 BASE = MBAR + 0x2C00
Each PSC uses 42 registers. The register address is calculated as base address for the regarding PSC plus the offset value.
Table 15-2
shows
the list with all implemented registers and the associated offset value.
Table 15-2. PSC Memory Map
Offset
Register Name
Register
width
Access
00
8
R/W
00
8
R/W
04
16
R
04
16
W
08
8
R/W
0C
32
R
0C
32
W
10
8
R
10
8
W
14
16
R
14
16
W
18
8
W
1C
8
W
20
32
R/W
24
32
W
28
32
R/W
2C
32
R
30
- Reserved
8
R/W
34
8
R
38
8
W
3C
8
W
40
32
R/W