Freescale Semiconductor MC68HC908MR16 ユーザーズマニュアル

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Freescale Semiconductor

These read/write registers contain the captured TIMA counter value of the input capture function or the 
output compare value of the output compare function. The state of the TIMA channel registers after reset 
is unknown.

In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the TIMA channel x registers 
(TACHxH) inhibits input captures until the low byte (TACHxL) is read.

In output compare mode (MSxB:MSxA 

≠ 0:0), writing to the high byte of the TIMA channel x registers 

(TACHxH) inhibits output compares until the low byte (TACHxL) is written.

Register Name and Address:

TACH0H — $0014

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TACH0L — $0015

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Write:

Reset:

Indeterminate after reset

Register Name and Address: TACH1H — $0017

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TACH1L — $0018

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TACH2H — $001A

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Write:

Reset:

Indeterminate after reset