Motorola CPCI-6020 ユーザーズマニュアル
CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
Functional Description
Board Reset Logic
96
There is an optional build configuration for reset from the RISCWatch JTAG interface. In Option
2, the RISCWatch CPURST_L will reset the Harrier ASIC in addition to the processor. This
option may be used in cases where the state of the Harrier logic must be guaranteed when a
RISCWatch CPURST_L is issued. However, implementing this option will prevent the use of the
RISCWatch probe Reset and Run from RAM mode since the Harrier SDRAM configuration
settings will be lost when the reset occurs. The Option 2 connection will not be implemented in
the standard board configuration.
2, the RISCWatch CPURST_L will reset the Harrier ASIC in addition to the processor. This
option may be used in cases where the state of the Harrier logic must be guaranteed when a
RISCWatch CPURST_L is issued. However, implementing this option will prevent the use of the
RISCWatch probe Reset and Run from RAM mode since the Harrier SDRAM configuration
settings will be lost when the reset occurs. The Option 2 connection will not be implemented in
the standard board configuration.
The RST_ and PURST_ inputs of Harrier B are tied to those of Harrier A, respectively. The
AUXRST_ and RSTSW_ inputs of Harrier B are held inactive. The RSTOUT_, HRST0_ and
SRST0_ outputs of Harrier B are not connected. The watchdog timers of Harrier B do not
generate reset.
AUXRST_ and RSTSW_ inputs of Harrier B are held inactive. The RSTOUT_, HRST0_ and
SRST0_ outputs of Harrier B are not connected. The watchdog timers of Harrier B do not
generate reset.
The following table shows which devices are affected by various reset sources:
Figure 4-2
Reset Block Diagram
Table 4-6 Reset Sources and Devices Affected
Device Affected
Processo
r
r
Harrier
ASIC
ASIC
PCI
Devices
Devices
ISA
Devices
Devices
Local
CompactPCI
Bus
CompactPCI
Bus
Software Hard Reset
(Harrier RSTOUT,
PBC Port 92)
(Harrier RSTOUT,
PBC Port 92)
¸
¸
¸
¸
¸
Software Hard Reset
(Harrier RSTOUT,
PBC Port 92)
(Harrier RSTOUT,
PBC Port 92)
¸
¸
¸
¸
¸
FAL_L
PRST_L
Power-up
Reset
XPMI.PINT.P0
Reset to rest of board
OR
RST_
HRST0_
RSTOUT_
OR
XCSR.WT2C
SRST0_
WDT2TO_
PURST_
RSTSW_
XCSR.MCSR.RSTOUT
AUXUST_
RSTSW_
XCSR.MCSR.RSTOUT
AUXUST_
OR
Switch
RW_HRST_
RW_SRST_
RW_TRST_
OR
OR
OR
Internal
Logic
OPT
2
OPT 1
HRST_
SRST_
TRST_
CPU
Harrier A