Motorola CPCI-6020 ユーザーズマニュアル
CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
Functional Description
On-Board LEDs
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4.10.8
On-Board LEDs
The CPCI-6020 provides two LEDs visible on the front panel for status of CPU and Board Fail
(BDFL).
(BDFL).
z
The green CPU LED is lit when the DBB# signal of processor bus is active (hardware
controlled).
controlled).
z
The yellow FAIL LED is lit when the Harrier BDFL bit in the Miscellaneous Control and
Status register is active (software controlled).
Status register is active (software controlled).
Refer to the Harrier Application Specific Integrated Circuit (ASIC) Programmer’s Reference
Guide for details of the BDFL bit.
Guide for details of the BDFL bit.
4.10.9
Harrier Power Up Configuration Header
An 8-pin header provides the means to change some of the Harrier power up configuration
settings. Refer to
settings. Refer to
for configuration settings
controlled by this header. A shunt must be installed to change a setting. The default
configuration setting (with the shunt not installed) is also given in that chapter.
configuration setting (with the shunt not installed) is also given in that chapter.
4.11
Hot Swap Support
The CPCI-6020 provides hardware to support the physical connection process and the
hardware connection process of the full hot swap system model defined in the CompactPCI Hot
Swap Specification. This hardware supports the hot swap of peripheral boards in standardized
(non-high availability) chassis. Hot swapping of the CPCI-6020, the system controller, itself is
not defined in the CompactPCI specifications. A description of CPCI-6020 support for system
slot hot swapping is in the following high availability support section.
hardware connection process of the full hot swap system model defined in the CompactPCI Hot
Swap Specification. This hardware supports the hot swap of peripheral boards in standardized
(non-high availability) chassis. Hot swapping of the CPCI-6020, the system controller, itself is
not defined in the CompactPCI specifications. A description of CPCI-6020 support for system
slot hot swapping is in the following high availability support section.
4.12
High Availability Support
The CPCI-6020 includes support for system slot hot swap in Motorola’s chassis. This includes
high availability (HA) features defined in the CompactPCI Hot Swap Specification as well as
Motorola’s added extensions.
high availability (HA) features defined in the CompactPCI Hot Swap Specification as well as
Motorola’s added extensions.
Standardized features include implementation of the BD_SEL#, HEALTHY# and PCI_RST#
signals. Motorola extensions are described in the following sections.
signals. Motorola extensions are described in the following sections.
4.12.1
HSC Bridge Board Interface
The CPCI-6020 interfaces with a local bridge card which resides on the remote CompactPCI
Bus. The bridge card is named local because it bridges down, in a hierarchical sense, from this
CPCI-6020 local domain to the remote bus. Similarly there is a remote CPU card with a remote
bridge card which bridges down to, and resides on, this local CompactPCI Bus.
Bus. The bridge card is named local because it bridges down, in a hierarchical sense, from this
CPCI-6020 local domain to the remote bus. Similarly there is a remote CPU card with a remote
bridge card which bridges down to, and resides on, this local CompactPCI Bus.