Cypress CY7C602xx ユーザーズマニュアル
CY7C601xx, CY7C602xx
Document 38-16016 Rev. *E
Page 46 of 68
Table 17-3. SPI Mode Timing vs. LSB First, CPOL, and CPHA
LSB
First
CPHA CPOL
Diagram
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
S C L K
S S E L
D A T A
X
X
M S B
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
L S B
S C L K
S S E L
X
X
D A T A
M S B
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
L S B
S C L K
S S E L
X
X
D A T A
M S B
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
L S B
SC L K
SSEL
D AT A
X
X
MS B
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
L S B
S C L K
S S E L
D A T A
X
X
M S B
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
L S B
SC LK
SSEL
X
X
DAT A
MSB
Bit 2
B it 3
Bit 4
B it 5
B it 6
Bit 7
LSB
SCLK
SSEL
X
X
DAT A
MSB
Bit 2
Bit 3
Bit 4
B it 5
B it 6
B it 7
LS B
SC L K
SSEL
D AT A
X
MS B
X
B it 2
B it 3
B it 4
B it 5
B it 6
B it 7
LS B