Nxp Semiconductors UM10237 ユーザーズマニュアル

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UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
320 of 792
NXP Semiconductors
UM10237
Chapter 12: LPC24XX LCD controller
 
7.23 Cursor Interrupt Mask register (CRSR_INTMSK, RW - 0xFFE1 0C20)
The CRSR_INTMSK register is used to enable or disable the cursor from interrupting the 
processor.
The contents of the CRSR_INTMSK register are described in 
.
 
7.24 Cursor Interrupt Clear register (CRSR_INTCLR, RW - 0xFFE1 0C24)
The CRSR_INTCLR register is used by software to clear the cursor interrupt status and 
the cursor interrupt signal to the processor.
The contents of the CRSR_INTCLR register are described in 
 
Table 281. Cursor Clip Position register (CRSR_CLIP, RW - 0xFFE1 0C14)
Bits
Function
Description
Reset 
value
31:14
reserved
Reserved, user software should not write ones to reserved bits. 
The value read from a reserved bit is not defined.
-
13:8
CrsrClipY
Cursor clip position for Y direction.
Distance from the top of the cursor image to the first displayed 
pixel in the cursor.
When 0, the first displayed pixel is from the top line of the cursor 
image.
0x0
7:6
reserved
Reserved, user software should not write ones to reserved bits. 
The value read from a reserved bit is not defined.
-
5:0
CrsrClipX
Cursor clip position for X direction.
Distance from the left edge of the cursor image to the first 
displayed pixel in the cursor.
When 0, the first pixel of the cursor line is displayed.
0x0
Table 282. Cursor Interrupt Mask register (CRSR_INTMSK, RW - 0xFFE1 0C20)
Bits
Function
Description
Reset 
value
31:1
reserved
Reserved, user software should not write ones to reserved bits. 
The value read from a reserved bit is not defined.
-
0
CrsrIM
Cursor interrupt mask.
When clear, the cursor never interrupts the processor.
When set, the cursor interrupts the processor immediately after 
reading of the last word of cursor image.
0x0
Table 283. Cursor Interrupt Clear register (CRSR_INTCLR, RW - 0xFFE1 0C24)
Bits
Function
Description
Reset 
value
31:1
reserved
Reserved, user software should not write ones to reserved bits. 
The value read from a reserved bit is not defined.
-
0
CrsrIC
Cursor interrupt clear.
Writing a 0 to this bit has no effect.
Writing a 1 to this bit causes the cursor interrupt status to be 
cleared.
0x0