Nxp Semiconductors UM10237 ユーザーズマニュアル

UM10237_2

© NXP B.V. 2008. All rights reserved.

The USB protocol insists on power management by the device. This becomes very critical 
if the device draws power from the bus (bus-powered device). The following constraints 
should be met by a bus-powered device:

1. A device in the non-configured state should draw a maximum of 100 mA from the bus.

2. A configured device can draw only up to what is specified in the Max Power field of 

the configuration descriptor. The maximum value is 500 mA.

3. A suspended device can draw a maximum of 500

μA.

The USB device controller clocks are shown in 

 

To help conserve power, the USB device controller automatically disables the AHB master 
clock and usbclk when not in use.

When the USB Device Controller goes into the suspend state (bus is idle for 3 ms), the 
usbclk input to the device controller is automatically disabled, helping to conserve power. 
However, if software wishes to access the device controller registers, usbclk must be 
active. To allow access to the device controller registers while in the suspend state, the 
USBClkCtrl and USBClkSt registers are provided.

When software wishes to access the device controller registers, it should first ensure 
usbclk is enabled by setting DEV_CLK_EN in the USBClkCtrl register, and then poll the 
corresponding DEV_CLK_ON bit in USBClkSt until set. Once set, usbclk will remain 
enabled until DEV_CLK_EN is cleared by software.

When a DMA transfer occurs, the device controller automatically turns on the AHB master 
clock. Once asserted, it remains active for a minimum of 2 ms (2 frames), to help ensure 
that DMA throughput is not affected by turning off the AHB master clock. 2 ms after the 
last DMA access, the AHB master clock is automatically disabled to help conserve power. 
If desired, software also has the capability of forcing this clock to remain enabled using the 
USBClkCtrl register.

Note that the AHB slave clock is always enabled as long as the PCUSB bit of PCONP is 
set. When the device controller is not in use, all of the device controller clocks may be 
disabled by clearing PCUSB.

The USB_NEED_CLK signal is used to facilitate going into and waking up from chip 
Power-down mode. USB_NEED_CLK is asserted if any of the bits of the USBClkSt 
register are asserted.

AHB master clock

Clock for the AHB master bus interface and DMA

AHB slave clock

Clock for the AHB slave interface

usbclk

48 MHz clock from the USB clock divider, used to recover the 
12 MHz clock from the USB bus