Nxp Semiconductors UM10237 ユーザーズマニュアル

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UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
468 of 792
NXP Semiconductors
UM10237
Chapter 18: LPC24XX CAN controllers CAN1/2
4.
Features
4.1 General CAN features
Compatible with CAN specification 2.0B, ISO 11898-1.
Multi-master architecture with non destructive bit-wise arbitration.
Bus access priority determined by the message identifier (11-bit or 29-bit).
Guaranteed latency time for high priority messages.
Programmable transfer rate (up to 1 Mbit/s).
Multicast and broadcast message facility.
Data length from 0 up to 8 bytes.
Powerful error handling capability.
Non-return-to-zero (NRZ) coding/decoding with bit stuffing.
4.2 CAN controller features
2 CAN controllers and buses.
Supports 11-bit identifier as well as 29-bit identifier.
Double Receive Buffer and Triple Transmit Buffer.
Programmable Error Warning Limit and Error Counters with read/write access.
Arbitration Lost Capture and Error Code Capture with detailed bit position.
Single Shot Transmission (no re-transmission).
Listen Only Mode (no acknowledge, no active error flags).
Reception of "own" messages (Self Reception Request).
4.3 Acceptance filter features
Fast hardware implemented search algorithm supporting a large number of CAN 
identifiers.
Global Acceptance Filter recognizes 11 and 29 bit Rx Identifiers for all CAN buses.
Allows definition of explicit and groups for 11-bit and 29-bit CAN identifiers.
Acceptance Filter can provide FullCAN-style automatic reception for selected 
Standard Identifiers.
5.
Pin description
 
Table 415. CAN Pin descriptions
Pin Name
Type
Description
RD1, RD2
Input
Serial Inputs.
 From CAN transceivers.
TD1, TD2
Output
Serial Outputs.
 To CAN transceivers.