Jameco Electronics 3000 ユーザーズマニュアル
150
Rabbit 3000 Microprocessor
11.1 Timer A
Timer A consists of ten separate countdown timers A1–A10 as shown in Figure 11-1.
Timers A1 and A2–A10 are 8-bit countdown registers as shown in Figure 11-2. The reload
register can contain any number in the range from 0 to 255. The counter divides by (n+1).
For example, if the reload register contains 127, then 128 pulses enter on the left before a
pulse exits on the right. If the reload register contains zero, then each pulse on the left
results in a pulse on the right, that is, there is division by one.
register can contain any number in the range from 0 to 255. The counter divides by (n+1).
For example, if the reload register contains 127, then 128 pulses enter on the left before a
pulse exits on the right. If the reload register contains zero, then each pulse on the left
results in a pulse on the right, that is, there is division by one.
Figure 11-2. Reload Register Operation
The timer systems can be driven by the peripheral clock, or peripheral clock divided by
two. This clock is always the same as the processor clock, or it is faster than the processor
clock by a factor of eight. The output pulses are always one clock long. Clocking of the
counters takes place on the negative edge of this pulse. When the counter reaches zero, the
reload register is loaded on the next input pulse instead of a count being performed. The
reload registers may be reloaded at any time since the peripheral clock is synchronous
with the processor clock.
two. This clock is always the same as the processor clock, or it is faster than the processor
clock by a factor of eight. The output pulses are always one clock long. Clocking of the
counters takes place on the negative edge of this pulse. When the counter reaches zero, the
reload register is loaded on the next input pulse instead of a count being performed. The
reload registers may be reloaded at any time since the peripheral clock is synchronous
with the processor clock.
Timers A2, A3, A4, A5, A6 and A7 always provide the baud clock for Serial Ports E, F, A,
B, C, and D respectively. Except for very low baud rates, clock A1 does not need to be
used to prescale the input clock for timers A2–A7. For example, if the system clock is
11.0592 MHz, and the timer A4 divides by 144, an asynchronous baud rate of 2400 bps can
be achieved in one step (assuming that the timer is clocked by peripheral clock divided by
two). The clock input to the serial port can be 8 or 16 times the baud rate for asynchronous
mode and 8 times the baud rate for synchronous mode. The maximum asynchronous baud
rate with a 11.0592 MHz clock would be (11,059,200/(1*8) = 1,382,400.
B, C, and D respectively. Except for very low baud rates, clock A1 does not need to be
used to prescale the input clock for timers A2–A7. For example, if the system clock is
11.0592 MHz, and the timer A4 divides by 144, an asynchronous baud rate of 2400 bps can
be achieved in one step (assuming that the timer is clocked by peripheral clock divided by
two). The clock input to the serial port can be 8 or 16 times the baud rate for asynchronous
mode and 8 times the baud rate for synchronous mode. The maximum asynchronous baud
rate with a 11.0592 MHz clock would be (11,059,200/(1*8) = 1,382,400.
8-bit down counter
8-bit reload register
Clock in
pulse on zero count out
load
Input clock
Count value
Count value
2
1
0
N
N-1
1
0
2
Output pulse