Jameco Electronics 3000 ユーザーズマニュアル
User’s Manual
215
16. AC T
IMING
S
PECIFICATIONS
The Rabbit 3000 processor may be operated at voltages between 1.8 V and 3.6 V, and at
temperatures from –40°C to +85°C with use possible use over the extended range -55°C to
+105°C. For long life it is desirable not to exceed a die temperature of 125°C. Most users
will operate the Rabbit at 3.3 V.
temperatures from –40°C to +85°C with use possible use over the extended range -55°C to
+105°C. For long life it is desirable not to exceed a die temperature of 125°C. Most users
will operate the Rabbit at 3.3 V.
16.1 Memory Access Time
Required memory address and output enable access time for some important typical cases
are given in the table below. It is assumed that the clock doubler is used, that the clock
spreader is enabled in the normal mode, that the memory early output enable is on, and
that the address bus has 60 pF load.
are given in the table below. It is assumed that the clock doubler is used, that the clock
spreader is enabled in the normal mode, that the memory early output enable is on, and
that the address bus has 60 pF load.
All important signals on the Rabbit 3000 are output synchronized with the internal clock.
The internal clock is closely synchronized with the external clock (CLK) that may be
optionally output from pin 2 of the TQFP package. The delay in signal output depends on
the capacitive load on the output lines. In the case of the address lines, which are critically
important for establishing memory access time requirements, the capacitive loading is
usually in the range of 25–100 pF, and the load is due to the input capacitance of the mem-
ory devices and PC trace capacitance. Delays are expressed from the waveform midpoint
in keeping with the convention used by memory manufacturers.
The internal clock is closely synchronized with the external clock (CLK) that may be
optionally output from pin 2 of the TQFP package. The delay in signal output depends on
the capacitive load on the output lines. In the case of the address lines, which are critically
important for establishing memory access time requirements, the capacitive loading is
usually in the range of 25–100 pF, and the load is due to the input capacitance of the mem-
ory devices and PC trace capacitance. Delays are expressed from the waveform midpoint
in keeping with the convention used by memory manufacturers.
Table 16-1. Memory Requirements at 3.3 V, -40°C to +85°C, Adr Bus 60 pF
Clock
Frequency
(MHz)
Period
(ns)
Clock Doubler
Nominal Delay
(ns)
Memory Address
Access
(ns)
Memory Output
Enable Access
(ns)
18.43
54
20
97
60
22.11
45
20
78
51
24.00
42
19
72
45
25.80
39
17
66
43
29.49
34
16
56
37
44.24
22.5
10
33.5
22