Motorola MCF5281 ユーザーズマニュアル
17-34
MCF5282 User’s Manual
MOTOROLA
Programming Model
17.5.4.10 Transmit Control Register (TCR)
The TCR is read/write and is written by the user to configure the transmit block. This
register is cleared at system reset. Bits 2 and 1 should be modified only when
ECR[ETHER_EN] = 0.
register is cleared at system reset. Bits 2 and 1 should be modified only when
ECR[ETHER_EN] = 0.
1
DRT
Disable receive on transmit.
0 Receive path operates independently of transmit (use for
0 Receive path operates independently of transmit (use for
full duplex or to monitor transmit activity in half duplex
mode).
mode).
1 Disable reception of frames while transmitting (normally
used for half duplex mode).
0
LOOP
Internal loopback. If set, transmitted frames are looped back
internal to the device and the transmit output signals are not
asserted. The system clock is substituted for the ETXCLK
when LOOP is asserted. DRT must be set to zero when
asserting LOOP.
internal to the device and the transmit output signals are not
asserted. The system clock is substituted for the ETXCLK
when LOOP is asserted. DRT must be set to zero when
asserting LOOP.
31
16
Field
—
Reset
0000_0000_0000_0000
R/W
R/W
15
5
4
3
2
1
0
Field
—
RFC_PAUSE TFC_PAUSE
FDEN
HBC GTS
Reset
0000_0000_0000_0000
R/W
R/W
R
R/W
Address
IPSBAR + 0x10C4
Figure 17-13. Transmit Control Register (TCR)
Table 17-21. RCR Field Descriptions (continued)
Bits
Name
Description