Motorola MCF5281 ユーザーズマニュアル

23-18

MOTOROLA

 

Figure 23-17 shows a signal configuration for a UART/RS-232 interface.

This section describes operation of the clock source generator, transmitter, and receiver.

The system clock serves as the basic timing reference for the clock source generator logic,
which consists of a clock generator and a programmable 16-bit divider dedicated to each
UART. The clock generator might not produce standard baud rates if the system clock is
used, so the 16-bit divider should be used. 

As Figure 23-18 shows, the UARTn transmitter and receiver can use the following clock
sources:

• An external clock signal on the DTINn pin that can be divided by 16. When not 

divided, DTINn provides a synchronous clock mode; when divided by 16, it is 
asynchronous. 

Transmitter Serial 
Data Output 
(UTXDn) 

UTXDn is held high (mark condition) when the transmitter is disabled, idle, or operating in the local 
loop-back mode. Data is shifted out on UTXDn on the falling edge of the clock source, with the least 
significant bit (lsb) sent first. 

Receiver Serial 
Data Input 
(URXDn) 

Data received on URXDn is sampled on the rising edge of the clock source, with the lsb received first. 

Clear-to-
Send (UCTSn) 

This input can generate an interrupt on a change of state. 

Request-to-
Send (URTSn) 

This output can be programmed to be negated or asserted automatically by either the receiver or the 
transmitter. When connected to a transmitter’s UCTSn, URTSn can control serial data flow. 

URTSn

DO2

DI1

UCTSn

UTXDn

URXDn

DI2

DO1

RS-232 Transceiver

UART