Motorola MCF5281 ユーザーズマニュアル

MOTOROLA

Chapter 29.  Debug Support  

29-43

Exception Processing

PST = 0xC,

{PST = 0xB,DD = destination},

// stack frame

{PST = 0xB,DD = destination},

// stack frame

{PST = 0xB,DD = source},

// vector read

PST = 0x5,

{PST = [0x9AB],DD = target}

// handler PC

The PST/DDATA specification for the reset exception is shown below:

Exception Processing

PST = 0xC,
PST = 0x5,

{PST = [0x9AB],DD = target}

// handler 

PC

The initial references at address 0 and 4 are never captured nor displayed since these
accesses are treated as instruction fetches.

For all types of exception processing, the PST = 0xC value is driven at all times, unless the
PST output is needed for one of the optional marker values or for the taken branch indicator
(0x5).
Table 29-23 shows the PST/DDATA specification for multiply-accumulate instructions.

wddata.b

<ea>y

PST = 0x4, {PST = 0x8, DD = source operand

wddata.l

<ea>y

PST = 0x4, {PST = 0xB, DD = source operand

wddata.w

<ea>y

PST = 0x4, {PST = 0x9, DD = source operand

1

For JMP and JSR instructions, the optional target instruction address is displayed only for those effective address fields 
defining variant addressing modes. This includes the following <ea>x values: (An), (d16,An), (d8,An,Xi), (d8,PC,Xi).

2

For Move Multiple instructions (MOVEM), the processor automatically generates line-sized transfers if the operand 
address reaches a 0-modulo-16 boundary and there are four or more registers to be transferred. For these line-sized 
transfers, the operand data is never captured nor displayed, regardless of the CSR value. 
The automatic line-sized burst transfers are provided to maximize performance during these sequential memory access 
operations.

3

During normal exception processing, the PST output is driven to a 0xC indicating the exception processing state. The 
exception stack write operands, as well as the vector read and target address of the exception handler may also be 
displayed.

mac.l

Ry,Rx,Accx

PST = 0x1

mac.l

RyRx,<ea>,Rw,Accx  PST = 0x1, {PST = 0xB, DD = source operand}

mac.w

Ry,Rx,Accx

PST = 0x1

mac.w

Ry,Rx,<ea>,Rw,Accx PST = 0x1, 

{PST = 0xB, DD = source operand}

move.l

<ea>y,Accx

PST = 0x1

move.l

Accy,Accx PST = 0x1

move.l

<ea>y,MACR

PST = 0x1

move.l

<ea>y,MASK PST = 0x1

move.l

<ea>y,Accext01 PST = 0x1

move.l

<ea>y,Accext23 PST = 0x1