Motorola MC9S12GC-Family ユーザーズマニュアル
Device User Guide — 9S12C128DGV1/D V01.05
125
Table C-5 Expanded Bus Timing Characteristics (3.3V Range)
Conditions are VDDX=3.3V+/-10%, Junction Temperature -40˚C to +140˚C, C
LOAD
= 50pF
Num
C
Rating
Symbol
Min
Typ
Max
Unit
1
D
Frequency of operation (E-clock)
f
o
0
16.0
MHz
2
D
Cycle time
t
cyc
62.5
ns
3
D
Pulse width, E low
PW
EL
30
ns
4
D
Pulse width, E high
1
PW
EH
30
ns
5
D
Address delay time
t
AD
16
ns
6
D
Address valid time to E rise (PW
EL
–t
AD
)
t
AV
16
ns
7
D
Muxed address hold time
t
MAH
2
ns
8
D
Address hold to data valid
t
AHDS
7
ns
9
D
Data hold to address
t
DHA
2
ns
10
D
Read data setup time
t
DSR
15
ns
11
D
Read data hold time
t
DHR
0
ns
12
D
Write data delay time
t
DDW
15
ns
13
D
Write data hold time
t
DHW
2
ns
14
D
Write data setup time
(PW
EH
–t
DDW
)
t
DSW
15
ns
15
D
Address access time
t
ACCA
29
ns
16
D
E high access time
(PW
EH
–t
DSR
)
t
ACCE
15
ns
17
D
Read/write delay time
t
RWD
14
ns
18
D
Read/write valid time to E rise (PW
EL
–t
RWD
)
t
RWV
16
ns
19
D
Read/write hold time
t
RWH
2
ns
20
D
Low strobe delay time
t
LSD
14
ns
21
D
Low strobe valid time to E rise (PW
EL
–t
LSD
)
t
LSV
16
ns
22
D
Low strobe hold time
t
LSH
2
ns
23
D
NOACC strobe delay time
t
NOD
14
ns
24
D
NOACC valid time to E rise (PW
EL
–t
LSD
)
t
NOV
16
ns
25
D
NOACC hold time
t
NOH
2
ns
26
D
IPIPO[1:0] delay time
t
P0D
2
14
ns
27
D
IPIPO[1:0] valid time to E rise (PW
EL
–t
P0D
)
t
P0V
16
ns
28
D
IPIPO[1:0] delay time
t
P1D
2
25
ns
29
D
IPIPO[1:0] valid time to E fall
t
P1V
11
ns
NOTES
:
1. Affected by clock stretch: add N x t
cyc
where N=0,1,2 or 3, depending on the number of clock stretches.