Epson S1D13504 ユーザーズマニュアル
Page 32
Epson Research and Development
Vancouver Design Center
S1D13504
Hardware Functional Specification
X19A-A-002-18
Issue Date: 01/01/30
5.6 Multiple Function Pin Mapping
Note
1.
All GPIO pins default to input on reset, and unless programmed otherwise should be
connected to either V
connected to either V
SS
or IO V
DD
if not used.
Table 5-9: Host Bus Interface Pin Mapping
S1D13504
Pin Names
SH-3
MC68K Bus 1
MC68K Bus 2
Generic MPU
AB[20:1]
A[20:1]
A[20:1]
A[20:1]
A[20:1]
AB0
A0
LDS#
A0
A0
DB[15:0]
D[15:0]
D[15:0]
D[31:16]
D[15:0]
WE1#
WE1#
UDS#
DS#
WE1#
M/R#
External Decode
External Decode
External Decode
External Decode
CS#
CSn#
External Decode
External Decode
External Decode
BUSCLK
CKIO
CLK
CLK
BCLK
BS#
BS#
AS#
AS#
Connect to IO V
DD
RD/WR#
RD/WR#
R/W#
R/W#
RD1#
RD#
RD#
Connect to IO V
DD
SIZ1
RD0#
WE0#
WE0#
Connect to IO V
DD
SIZ0
WE0#
WAIT#
WAIT#
DTACK#
DSACK1#
WAIT#
RESET#
RESET#
RESET#
RESET#
RESET#
Table 5-10: Memory Interface Pin Mapping
S1D13504
Pin Names
FPM/EDO-DRAM
Sym 256Kx16
Asym 256Kx16
Sym 1Mx16
Asym 1Mx16
2-CAS#
2-WE#
2-CAS#
2-WE#
2-CAS#
2-WE#
2-CAS#
2-WE#
MD[15:0]
DQ[15:0]
MA[8:0]
A[8:0]
MA9
GPIO3
1
A9
MA10
GPIO1
1
A10
MA11
GPIO2
1
A11
UCAS#
UCAS#
UWE#
UCAS#
UWE#
UCAS#
UWE#
UCAS#
UWE#
LCAS#
LCAS#
CAS#
LCAS#
CAS#
LCAS#
CAS#
LCAS#
CAS#
WE#
WE#
LWE#
WE#
LWE#
WE#
LWE#
WE#
LWE#
RAS#
RAS#