Intel 80C186XL ユーザーズマニュアル
BUS INTERFACE UNIT
3-26
Figure 3-23. Interrupt Acknowledge Bus Cycle
T1
T2
T3
T4
CLKOUT
ALE
TI
TI
T1
T2
T3
AD15:0
[AD7:0]
[AD7:0]
RD, WR
BHE
DEN
DT/R
LOCK
S2:0
INTA0
INTA1
INTA1
A19:16
[A15:8]
[A15:8]
NOTE: Vector Type is read from AD7:0 only.
INTA occurs during T2 in slave mode.
INTA occurs during T2 in slave mode.
Note
A15:8 are unknown
A19:16 are driven low
A19:16 are driven low
Note
Note
T4
A1048-0A