Renesas R5S72622 ユーザーズマニュアル
Section 25 NAND Flash Memory Controller
R01UH0134EJ0400 Rev. 4.00
Page 1305 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
25.3.7
Data Register (FLDATAR)
FLDATAR is a 32-bit readable/writable register. It stores input/output data used when 0 is written
to the CDSRC bit in FLCMDCR in command access mode. FLDATAR cannot be used for
reading or writing of five or more bytes of contiguous data.
to the CDSRC bit in FLCMDCR in command access mode. FLDATAR cannot be used for
reading or writing of five or more bytes of contiguous data.
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DT4[7:0]
DT3[7:0]
DT2[7:0]
DT1[7:0]
Bit Bit
Name
Initial
Value
Value
R/W Description
31 to 24 DT4[7:0]
H'00
R/W
Fourth Data
Specify the 4th data to be input or output via the NAF7
to NAF0 pins.
to NAF0 pins.
In write: Specify write data
In read: Store read data
23 to 16 DT3[7:0]
H'00
R/W
Third Data
Specify the 3rd data to be input or output via the NAF7
to NAF0 pins.
to NAF0 pins.
In write: Specify write data
In read: Store read data
15 to 8
DT2[7:0]
H'00
R/W
Second Data
Specify the 2nd data to be input or output via the NAF7
to NAF0 pins.
to NAF0 pins.
In write: Specify write data
In read: Store read data
7 to 0
DT1[7:0]
H'00
R/W
First Data
Specify the 1st data to be input or output via the NAF7
to NAF0 pins.
to NAF0 pins.
In write: Specify write data
In read: Store read data