Intel D425 AU80610006252AA ユーザーズマニュアル

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Datasheet  

BIOS also knows the range from FEC0_0000h to FFFF_FFFFh is not usable by the 

system. This 20MB range at the very top of addressable memory space is lost to APIC. 

According to the above equation,TOLUD is originally calculated to: 4GB = 
1_0000_0000h 

  The system memory requirements are: 4GB (max addressable space) - 1GB (PCI 

space) - 35MB (lost memory) = 3GB - 35MB (minimum granularity) = ECB0_0000h 

Since ECB0_0000h (PCI and other system requirements) is less than 1_0000_0000h, 
TOLUD should be programmed to ECBh. 

 

 

15:4 RW/L  001h  Core 

Top of Low Usable DRAM (TOLUD):  
This register contains bits 31 to 20 of an 
address one byte above the maximum DRAM 
memory below 4G that is usable by the 
operating system. Address bits 31 down to 20 
programmed to 01h implies a minimum memory 
size of 1MBs. Configuration software must set 
this value to the smaller of the following 2 
choices: maximum amount memory in the 
system minus ME stolen memory plus one byte 
or the minimum address allocated for PCI 
memory. Address bits 19:0 are assumed to be 
0_0000h for the purposes of address 
comparison. The Host interface positively 
decodes an address towards DRAM if the 
incoming address is less than the value 
programmed in this register.  

NOTE:  The Top of Low Usable DRAM is the 

lowest address above both Graphics 
Stolen memory and Tseg. BIOS 
determines the base of Graphics Stolen 
Memory by subtracting the Graphics 
Stolen Memory Size from TOLUD and 
further decrements by Tseg size to 
determine base of Tseg.  

This register must be 64MB aligned 

when reclaim is enabled.

 

3:0 RO 0000b 

Core