Freescale Semiconductor MPC5200B ユーザーズマニュアル
MPC5200B Users Guide, Rev. 1
7-64
Freescale Semiconductor
Slice Timers
7.5.1.3
SLT 0 Count Value Register—MBAR + 0x0708
SLT 1 Count Value Register—MBAR + 0x0718
SLT 1 Count Value Register—MBAR + 0x0718
Bit
Name
Description
0:4
—
Reserved
5
Run_ Wait
A high indicates the Timer should run continuously while enabled. When the Timer counter
reaches terminal count it immediately resets to 0 and resumes counting. If the Run/Wait bit is
set low, the Timer Counter expires, but then waits until the Timer is cleared (either by writing 1
to the status bit or by disabling and re-enabling the Timer), before resuming operation.
reaches terminal count it immediately resets to 0 and resumes counting. If the Run/Wait bit is
set low, the Timer Counter expires, but then waits until the Timer is cleared (either by writing 1
to the status bit or by disabling and re-enabling the Timer), before resuming operation.
6
Interrupt
Enable
CPU Interrupt is generated only if this bit is high. This bit does not affect operation of the Timer
Counter or Status Bit registers.
Counter or Status Bit registers.
7
Timer
Enable
While this bit is high the Timer operates normally, while low the Timer is reset and remains idle.
8:32
—
Reserved
Table 7-53. SLT 0 Count Value Register
SLT 1 Count Value Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Reserved
TimerCount
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TimerCount
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:7
—
Reserved
8:31
Timer
Count
Provides current state of the Timer counter. This register does not chodange while a read is in
progress, but the actual Timer counter continues unaffected.
progress, but the actual Timer counter continues unaffected.