Freescale Semiconductor MPC5200B ユーザーズマニュアル

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PSC FIFO System
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
15-75
Figure 15-24. Local Loop-Back
Features of this local loop-back mode are:
Transmitter and CPU-to-receiver communications continue normally.
RxD input data is ignored.
TxD data is held marking.
The receiver is clocked by the transmitter clock. 
Transmitter must be enabled, but the receiver need not be enabled.
15.4.3.3
Remote Loop-Back Mode
In remote loop-back mode, shown in 
, the channel automatically transmits received data bit-by-bit on the TxD output. The local 
CPU-to-transmitter link is disabled. This mode is useful in testing receiver and transmitter operation of a remote channel. For this mode, the 
transmitter uses the receiver clock.
Because the receiver is not active, received data cannot be read by the CPU and error status conditions are inactive. Received parity is not 
checked and is not recalculated for transmission. Stop bits are sent as they are received. A received break is echoed as received until the next 
valid start bit is detected.
Figure 15-25. Remote Loop-Back
15.4.4
Multidrop Mode
Settin
[PM] programs the PSC to operate in a Walk-up mode for multidrop or multiprocessor applications. In this mode, a master can 
transmit an address character followed by a block of data characters targeted for one of up to 256 slave stations.
Although slave stations have their channel receivers disabled, they continuously monitor the masters data stream. When the master sends an 
address character, the slave receiver channel notifies its respective CPU by setting 
[RxRDY] and generating an interrupt (if programmed 
to do so). Each slave station CPU then compares the received address to its station address and enables its receiver if it wishes to receive the 
subsequent data characters or block of data from the master station. Slave stations not addressed continue monitoring the data stream. Data 
fields in the data stream are separated by an address character. After a slave receives a block of data, its CPU disables the receiver and repeats 
the process.
 shows functional timing information for multidrop mode.
CPU
Disabled
Disabled
RxD Input
TxD Input
Tx
Rx
CPU
Disabled
Disabled
RxD Input
TxD Input
Tx
Rx
Disabled
Disabled