Freescale Semiconductor MPC5200B ユーザーズマニュアル

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MPC5200B Users Guide, Rev. 1
19-24
Freescale Semiconductor
Programmer’s Model of Message Storage
19.6.1
Identifier Registers (IDR0-3)
The identifier registers for an extended format identifier consist of a total of 32 bits; ID28 - ID0, SRR, IDE, and RTR bits. The identifier 
registers for a standard format identifier consist of a total of 13 bits; ID10 - ID0, RTR, and IDE bits.
ID28 - ID0 — Extended format identifier
The identifiers consist of 29 bits (ID28 - ID0) for the extended format. ID28 is the most significant bit and is transmitted first on the bus during 
the arbitration procedure. The priority of an identifier is defined to be highest for the smallest binary number.
ID10 - ID0 — Standard format identifier
The identifiers consist of 11 bits (ID10 – ID0) for the standard format. ID10 is the most significant bit and is transmitted first on the bus during 
the arbitration procedure. The priority of an identifier is defined to be highest for the smallest binary number.
SRR — Substitute Remote Request
This fixed recessive bit is used only in extended format. It must be set to 1 by the user for transmission buffers and is stored as received on 
the CAN bus for receive buffers. 
IDE — ID Extended
This flag indicates whether the extended or standard identifier format is applied in this buffer. In the case of a receive buffer, the flag is set as 
received and indicates to the CPU how to process the buffer identifier registers. In the case of a transmit buffer, the flag indicates to the 
MSCAN what type of identifier to send.
1=Extended format (29 bit)
0=Standard format (11 bit)
RTR — Remote Transmission Request
This flag reflects the status of the Remote Transmission Request bit in the CAN frame. In the case of a receive buffer, it indicates the status 
of the received frame and supports the transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the 
setting of the RTR bit to be sent.
1=Remote frame
0=Data frame
19.6.2
Data Segment Registers (DSR0-7)
The eight data segment registers, each with bits DB7-DB0, contain the data to be transmitted or received. The number of bytes to be 
transmitted or received is determined by the data length code in the corresponding DLR register.
DB7 - DB0 — Data Bits 7-0
Table 19-28. Standard Identifier Mapping
Register
Bit  7
6
5
4
3
2
1
Bit  0
ADDR
IDR0
Read:
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
$__x0
Write:
IDR1
Read:
ID2
ID1
ID0
RTR
IDE (=0)
$__x1
Write:
IDR2
Read:
$__x4
Write:
IDR3
Read:
$__x5
Write:
= Unused
a
a
Unused bits are always read ‘x’