Freescale Semiconductor MPC5200B ユーザーズマニュアル

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MPC5200B Users Guide, Rev. 1
19-26
Freescale Semiconductor
Functional Description
19.6.5
MSCAN Time Stamp Register High (TSRH)—MBAR + 0x097C / 0x09FC
 
READ: Anytime
WRITE: Unimplemented
19.6.6
MSCAN Time Stamp Register Low (TSRL)—MBAR + 0x097D / 0x09FD
 
READ: Anytime
WRITE: Unimplemented
19.7
Functional Description
19.7.1
General
This section provides a complete functional description of the MSCAN. It describes each of the features and modes listed in the introduction.
Table 19-31. MSCAN Time Stamp Register (High Byte)
msb  0
1
2
3
4
5
6
7  lsb
R
TS
R1
5
TS
R1
4
TS
R1
3
TS
R1
2
TS
R1
1
TS
R1
0
TSR
9
TSR
8
W
RESET:
0
0
0
0
0
0
0
0
Bit
Name
Description
0:7
TSR[15:8]
If TIME bit is enabled, MSCAN writes a special time stamp to respective registers in active 
Tx or Rx buffer as soon as a message is acknowledged on the CAN bus. Time stamp is 
written on bit sample point for recessive bit of ACK delimiter in CAN frame. If Tx, CPU can 
only read time stamp after respective Tx buffer is flagged empty.
Timer value, used for stamping, is taken from a free running internal CAN bit-clock. Timer 
overrun is not indicated by MSCAN. Timer is reset (all bits set to 0) during initialization 
mode. CPU can only read time stamp registers.
Table 19-32. MSCAN Time Stamp Register (Low Byte)
msb  0
1
2
3
4
5
6
7  lsb
R
TSR
7
TSR
6
TSR
5
TSR
4
TSR
3
TSR
2
TSR
1
TSR
0
W
RESET:
0
0
0
0
0
0
0
0
Bit
Name
Description
0:7
TSR[7:0]
If TIME bit is enabled, MSCAN writes a special time stamp to respective registers in active 
Tx or Rx buffer as soon as message is acknowledged on CAN bus. Time stamp is written 
on bit sample point for recessive bit of ACK delimiter in CAN frame. If Tx, CPU can only 
read time stamp after respective Tx buffer is flagged empty.
Timer value, used for stamping, is taken from a free running internal CAN bit-clock. Timer 
overrun is not indicated by MSCAN. Timer is reset (all bits set to 0) during initialization 
mode. CPU can only read time stamp registers.