Dataram 16GB DDR3-1600 DTM64385E ユーザーズマニュアル
製品コード
DTM64385E
DTM64385E
16GB - 240-Pin 2Rx4 Registered ECC DDR3 DIMM
Document 06325, Revision A, 1-Apr-14, Dataram Corporation
© 2014
Page 1
Features
Description
240-pin JEDEC-compliant DIMM, 133.35 mm wide by 30 mm high
DTM64385E is a registered 2Gx72 memory module,
which conforms to JEDEC's DDR3, PC3-12800 standard.
The assembly is Dual-Rank. Each Rank is comprised of
eighteen Samsung 1Gx4 DDR3-1600 SDRAMs.
One 2K-bit EEPROM is used for Serial Presence Detect
and a combination register/PLL, with Address and
Command Parity, is also used.
Both output driver strength and input termination
impedance are programmable to maintain signal integrity
on the I/O signals in a Fly-by topology. A thermal sensor
accurately monitors the DIMM module and can prevent
exceeding the maximum operating temperature of 95C.
which conforms to JEDEC's DDR3, PC3-12800 standard.
The assembly is Dual-Rank. Each Rank is comprised of
eighteen Samsung 1Gx4 DDR3-1600 SDRAMs.
One 2K-bit EEPROM is used for Serial Presence Detect
and a combination register/PLL, with Address and
Command Parity, is also used.
Both output driver strength and input termination
impedance are programmable to maintain signal integrity
on the I/O signals in a Fly-by topology. A thermal sensor
accurately monitors the DIMM module and can prevent
exceeding the maximum operating temperature of 95C.
Operating Voltage: 1.5V ±0.075
I/O Type: SSTL_15
On-board I
2
C temperature sensor with integrated Serial Presence-
Detect (SPD) EEPROM
Data Transfer Rate: 12.8 Gigabytes/sec
Data Bursts: 8 and burst chop 4 mode
ZQ Calibration for Output Driver and On-Die Termination (ODT)
Programmable ODT / Dynamic ODT during Writes
Programmable CAS Latency: 6, 7, 8, 9, 10, and 11
Bi-directional Differential Data Strobe signals
SDRAM Addressing (Row/Col/Bank): 16/11/3
Fully RoHS Compliant
Pin Configuration
Pin Description
Front Side
Back Side
Name
Function
1 V
REFDQ
31 DQ25
61 A2
91 DQ41
121 V
SS
151 V
SS
181 A1 211 V
SS
CB[7:0]
Data Check Bits
2 V
SS
32
V
SS
62
V
DD
92
V
SS
122
DQ4
152 DQS12
182 V
DD
212 DQS14
DQ[63:0]
Data
Bits
3 DQ0 33 /DQS3
63
CK1* 93 /DQS5 123 DQ5 153 /DQS12 183 V
DD
213 /DQS14
DQS[17:0], /DQS[17:0] Differential Data Strobes
4 DQ1 34 DQS3
64
/CK1* 94 DQS5 124 V
SS
154 V
SS
184 CK0
214 V
SS
CK[1:0], /CK[1:0]
Differential Clock Inputs
5 V
SS
35
V
SS
65
V
DD
95
V
SS
125
DQS9
155 DQ30 185 /CK0
215 DQ46 CKE[1:0]
Clock
Enables
6 /DQS0 36 DQ26
66 V
DD
96
DQ42
126
/DQS9
156 DQ31 186 V
DD
216 DQ47
/CAS
Column Address Strobe
7 DQS0 37 DQ27
67 V
REFCA
97 DQ43 127
V
SS
157 V
SS
187 /EVENT
217 V
SS
/RAS
Row Address Strobe
8 V
SS
38
V
SS
68
P
AR
_I
N
98 V
SS
128
DQ6
158 CB4 188 A0 218 DQ52 /S[3:0]
Chip
Selects
9 DQ2 39 CB0
69 VDD
99 DQ48 129 DQ7 159 CB5
189 V
DD
219 DQ53 /WE
Write
Enable
10 DQ3
40 CB1
70 A10/AP 100 DQ49
130 V
SS
160 V
SS
190 BA1
220 V
SS
A[15:0]
Address
Inputs
11 V
SS
41
V
SS
71
BA0
101
V
SS
131
DQ12
161 DQS17
191 V
DD
221 DQS15
BA[2:0]
Bank
Addresses
12 DQ8
42 /DQS8
72 V
DD
102 /DQS6
132 DQ13
162 /DQS17
192 /RAS
222 /DQS15
ODT[1:0]
On Die Termination Inputs
13 DQ9
43 DQS8
73 /WE
103 DQS6
133 V
SS
163 V
SS
193 /S0
223 V
SS
SA[2:0]
SPD
Address
14 V
SS
44
V
SS
74
/CAS
104
V
SS
134
DQS10
164 CB6 194 V
DD
224 DQ54
SCL
SPD Clock Input
15 /DQS1 45 CB2
75 V
DD
105 DQ50
135 /DQS10 165 CB7
195 ODT0
225 DQ55
SDA
SPD Data Input/Output
16 DQS1 46 CB3
76 /S1
106 DQ51
136 V
SS
166 V
SS
196 A13
226 V
SS
/EVENT
Temperature Sensing
17 V
SS
47
V
SS
77
ODT1
107
V
SS
137
DQ14
167 NC
(TEST) 197 V
DD
227 DQ60
/RESET
Reset for register and DRAMs
18 DQ10 48 V
TT
78
V
DD
108 DQ56
138 DQ15
168 /RESET
198 /S3, NC 228 DQ61
PAR_IN
Parity bit for Addr/Ctrl
19 DQ11 49 V
TT
79 /S2, NC 109 DQ57
139 V
SS
169 CKE1 199 V
SS
229 V
SS
/ERR_OUT
Error bit for Parity Error
20 V
SS
50
CKE0 80
V
SS
110
V
SS
140
DQ20
170 V
DD
200 DQ36
230 DQS16
A12/BC
Combination input: Addr12/Burst Chop
21 DQ16 51 V
DD
81 DQ32
111 /DQS7
141 DQ21
171 A15
201 DQ37
231 /DQS16
A10/AP
Combination input: Addr10/Auto-precharge
22
DQ17
52
BA2
82
DQ33 112
DQS7 142
V
SS
172 A14
202 V
SS
232 V
SS
V
SS
Ground
23 V
SS
53
/E
RR
_O
UT
83 V
SS
113
V
SS
143
DQS11
173 V
DD
203 DQS13
233 DQ62
V
DD
Power
24 /DQS2 54 V
DD
84
/DQS4
114
DQ58
144
/DQS11 174 A12/BC
204 /DQS13
234 DQ63
V
DDSPD
SPD EEPROM Power
25 DQS2 55 A11
85 DQS4
115 DQ59
145 V
SS
175 A9
205 V
SS
235 V
SS
V
REFDQ
Reference Voltage for DQ’s
26 V
SS
56
A7
86
V
SS
116
V
SS
146
DQ22
176 V
DD
206 DQ38
236 V
DDSPD
V
REFCA
Reference Voltage for CA
27 DQ18 57 V
DD
87
DQ34
117
SA0
147
DQ23
177 A8 207 DQ39
237 SA1 V
TT
Termination Voltage
28 DQ19 58 A5
88 DQ35
118 SCL
148 V
SS
178 A6
208 V
SS
238 SDA NC
No
Connection
29 V
SS
59
A4
89
V
SS
119
SA2 149
DQ28
179 V
DD
209 DQ44
239 V
SS
* not used
30 DQ24 60 V
DD
90
DQ40
120
V
TT
150
DQ29
180 A3 210 DQ45
240 V
TT
Identification
DTM64385E 1Gx72
16GB 2Rx4 PC3-12800R-11-11-E2
Performance range
Clock / Module Speed / CL-t
16GB 2Rx4 PC3-12800R-11-11-E2
Performance range
Clock / Module Speed / CL-t
RCD
-t
RP
800 MHz / PC3-12800 / 11-11-11
667 MHz / PC3-10600 / 10-10-10
667 MHz / PC3-10600 / 9-9-9
533 MHz / PC3-8500 / 8-8-8
533 MHz / PC3-8500 / 7-7-7
400 MHz / PC3-6400 / 6-6-6
667 MHz / PC3-10600 / 10-10-10
667 MHz / PC3-10600 / 9-9-9
533 MHz / PC3-8500 / 8-8-8
533 MHz / PC3-8500 / 7-7-7
400 MHz / PC3-6400 / 6-6-6