Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT データシート
製品コード
PIC18F65K22-I/PT
PIC18F87K22 FAMILY
DS39960D-page 158
2009-2011 Microchip Technology Inc.
REGISTER 11-17: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
OSCFIP
—
SSP2IP
BCL2IP
BCL1IP
HLVDIP
TMR3IP
TMR3GIP
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIP:
Oscillator Fail Interrupt Priority bit
1
= High priority
0
= Low priority
bit 6
Unimplemented:
Read as ‘0’
bit 5
SSP2IP:
Master Synchronous Serial Port 2 Interrupt Priority bit
1
= High priority
0
= Low priority
bit 4
BCL2IP:
Bus Collision Interrupt priority bit (MSSP)
1
= High priority
0
= Low priority
bit 3
BCL1IP:
Bus Collision Interrupt Priority bit
1
= High priority
0
= Low priority
bit 2
HLVDIP:
High/Low-Voltage Detect Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
TMR3IP:
TMR3 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
bit 0
TMR3GIP:
TMR3 Gate Interrupt Priority bit
1
= High priority
0
= Low priority