Texas Instruments TPS65820 Evaluation Module TPS65820EVM TPS65820EVM データシート
製品コード
TPS65820EVM
INTERRUPT CONTROLLER AND SYSTEM SEQUENCING
Overview
INTERRUPT
CONTROLLER
INT
SDAT
SCLK
SEQUENCING
AND OPERATING
MODE SETTING
HOT_ RST
RESPWRON
TRSTPWON
SYS _IN
HOST INTERFACE AND SEQUENCING
I 2C ENGINE
I2C REGISTERS
NON-VOLATILE
MEMORY
CONTROL
LOGIC
1V
AC/USB/BAT
(HIGHER VOLTAGE)
VSYS
OUT
HOST
TPS65820
R 1
R 6
A1
C 16
R
5
R
3
R
2
R
4
CTRSTPWON
2.5 V
2.5 V
A1
AND
SLVS663B – MAY 2006 – REVISED APRIL 2008
..............................................................................................................................................................
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The TPS65820 has two dedicated internal controllers that execute the host interface and system sequencing
tasks: a sequencing controller and an interrupt controller.
tasks: a sequencing controller and an interrupt controller.
The sequencing controller monitors internal and system parameters and defines the sequencing of the internal
power supplies during power up and power down / power fault events, and executes specific internal power
supply reset operations under external hardware control or host software commands.
power supplies during power up and power down / power fault events, and executes specific internal power
supply reset operations under external hardware control or host software commands.
The following parameters are monitored by the sequencing controller :
•
System power bus voltage (at SYS_IN pin), input supply voltage, battery pack voltage
•
TPS65820 thermal fault status
•
Integrated supply status
The interrupt controller monitors multiple system status parameters and signals to the host when one of the
monitored parameters toggled, as a result of a system status change. The interrupt controller inputs include all
the parameters monitored by the sequencing controller plus:
monitored parameters toggled, as a result of a system status change. The interrupt controller inputs include all
the parameters monitored by the sequencing controller plus:
•
Charger status
•
Battery pack status
•
ADC status
Internal I
2
C registers enable masking of all the monitored parameters. Using those registers the host can select
which parameters trigger an interrupt or a power good fault. Power good faults trigger a change in the TPS65820
operating mode, as detailed in the next sections.
operating mode, as detailed in the next sections.
A simplified block diagram for the TPS65820 sections that interface to the external host is shown in
Figure 27. Simplified Block Diagram
32
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