Texas Instruments TPS65820 Evaluation Module TPS65820EVM TPS65820EVM データシート
製品コード
TPS65820EVM
SYSTEM SEQUENCING AND TPS65820 OPERATING MODES
LOAD POWER UP DEFAULTS IN
I2C REGISTERS
CONNECT AC , USB OR BAT PIN TO
OUT PIN
DISABLE POWER GOOD FAULT
DETECTION
INT PIN = HIGH IMPEDANCE
POR_FLAG= HI
OFF
ANY
STATE
V(AC) > V
UVLO
OR
V(USB) > V
UVLO
OR
V(BAT ) > V
UVLO
V(OUT) < V
UVLO
PGOOD FAULT :
A NON - MASKED BIT OF THE
POWER _GOOD I2C REGISTER TOGGLES
FROM LO TO HI
FROM LO TO HI
STANDBY ON
: SM1 AND SM2 SET IN STANDBY
MODE BY GPIO OR I 2C COMMAND
STANDBY OFF :
SM1 AND SM2 EXIT STANDBY
MODE BY GPIO OR I2C COMMAND
RESET TIMER :
VALUE SET BY CAPACITOR
CONNECTED TO TRSTPWON PIN
I2C SOFT_RESET BIT
LOCATED IN
SOFT_RESET REGISTER , BIT B0
POWER UP
SYS_IN INITIAL DEGLITCH
TIMER TINSYS EXPIRED
V
< V
THERMAL FAULT
I2C SOFT_RESET REGISTER
BIT SLEEP_MODE = HI
(SELF - CLEARED)
AND
OR
OR
(SYS_IN)
(LOW_SYS) FOR 5 msec
PGOOD
FAULT
POWER
CYCLE
AND
SLEEP NOT SET BY
THERMAL FAULT
PROCESSOR
STANDBY STATE
RESPWRON = HI
PG FOR SM1&SM2
is masked
ENABLE STATE
RESPWRON=LO,
RESET I2C ENGINE
- UP TIMER
SEQUENCE STATE
START INTEGRATED
SUPPLY START - UP SEQUENCE
RESPWRON = LO
POWER GOOD
CHECK STATE
CHECK STATE
RESPWRON=HI
ENABLE POWER GOOD COMPARATORS
INT PIN MODE SET BY INTERRUPT
CONTROLLER
=HI
RESET STATE
RESPWRON=LO
START SYSTEM RESET PULSE TIMER
WHEN HOT_RESET=HI
RESET
TIMER EXPIRES
V(SYS_IN) >
AND
V(OUT) > V
NO PGOOD
FAULT
STANDBY
ON
STANDBY
OFF
PGOOD
FAULT
RESPWRON=LO
V(HOT_RESET)=LO
OR
I2C SOFT_RESET
REGISTER BIT
SOFT_RST = HI
V(HOT_RESET)=HI OR
I2C SOFT_RESET
REGISTER BIT
SOFT_RESET = LO
(SELF CLEARED )
V(HOT _RESET)=LO
OR
I2C SOFT_RESET
REGISTER BIT
SOFT_RST= HI
UVLO
V
(LOW_SYS)
POWER UP DEFAULTS LOADED
IN ALL I2C REGISTERS
(Except INT_ACKn)
POWER DOWN RAILS,
WAIT 5 msec
START BOOT
SLEEP STATE
ONLY RTC _LDO IS ON
POWER PATH ACTIVE
RESPWRON = 0
REGISTER CONTENTS NOT RESET
INTERRUPT CLEARED
RESET I2C ENGINE
ENABLE I2C ENGINE
RESET I2C ENGINE
RESET I2C ENGINE
RESET I2C ENGINE
NORMAL MODE
RESPWRON
HOTPLUG DEGLITCH
START SYS_IN
INITIAL DEGLITCH TIMER
TINSYS
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SLVS663B – MAY 2006 – REVISED APRIL 2008
The TPS65820 has a state machine that controls the device power up and power down sequencing. The main
operating modes are shown in the state diagram below:
operating modes are shown in the state diagram below:
Figure 28. TPS65820 State Diagram
POWER-UP – If the AC, USB and BAT pin voltages are below the internal UVLO threshold V
UVLO
(2.5 V typ) all
IC blocks are disabled and the TPS65820 is not operational, with all functions OFF. When an external power
source or battery with voltage greater than the V
source or battery with voltage greater than the V
UVLO
voltage threshold is applied to AC/USB or BAT pins the
internal TPS65820 references are powered up, biasing internal circuits. When all the main internal supply rails
are active the TPS65820 I
are active the TPS65820 I
2
C registers are set to the power-up default values, shown in
Copyright © 2006–2008, Texas Instruments Incorporated
33
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