Texas Instruments CC2650DK ユーザーズマニュアル
µDMA Registers
12.5.1.13 SETCHNLPRIALT Register (Offset = 30h) [reset = X]
SETCHNLPRIALT is shown in
and described in
Channel Set Primary-Alternate
Figure 12-19. SETCHNLPRIALT Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
CHNLS
R/W-X
Table 12-20. SETCHNLPRIALT Register Field Descriptions
Bit
Field
Type
Reset
Description
31-0
CHNLS
R/W
X
Returns the channel control data structure status, or selects the
alternate data structure for the corresponding uDMA channel. Read
as: Bit [Ch] = 0: uDMA channel Ch is using the primary data
structure. Bit [Ch] = 1: uDMA channel Ch is using the alternate data
structure. Write as: Bit [Ch] = 0: No effect. Use the
CLEARCHNLPRIALT.CHNLS to disable a channel Bit [Ch] = 1:
Selects the alternate data structure for channel Ch Writing to a bit
where a uDMA channel is not implemented has no effect
alternate data structure for the corresponding uDMA channel. Read
as: Bit [Ch] = 0: uDMA channel Ch is using the primary data
structure. Bit [Ch] = 1: uDMA channel Ch is using the alternate data
structure. Write as: Bit [Ch] = 0: No effect. Use the
CLEARCHNLPRIALT.CHNLS to disable a channel Bit [Ch] = 1:
Selects the alternate data structure for channel Ch Writing to a bit
where a uDMA channel is not implemented has no effect
1066
Micro Direct Memory Access (µDMA)
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated