Texas Instruments CC2650DK ユーザーズマニュアル
Memory Mapping
If the source of the illegal operation is the MCU system, the arbiter returns a Bus Fault. If the source of the
illegal access is the sensor controller, the arbiter suspends the sensor controller by setting
[AUX_SCE:CTL:SUSPEND], and the flag [AUX_SCE:CPUSTAT:BUS_ERROR] is set.
illegal access is the sensor controller, the arbiter suspends the sensor controller by setting
[AUX_SCE:CTL:SUSPEND], and the flag [AUX_SCE:CPUSTAT:BUS_ERROR] is set.
The event bus in AUX routes events between AUX peripherals, as well as to and from the MCU and AON
event fabric. This can be used to, for example, trigger actions in modules as well as interrupting the
sensor controller.
event fabric. This can be used to, for example, trigger actions in modules as well as interrupting the
sensor controller.
17.2 Memory Mapping
The arbitrator in AUX_PD maps the system CPU and sensor controller addresses into local PBUS
addresses. Each peripheral instance has a 4-kB memory space allocated in the system CPU address
space.
addresses. Each peripheral instance has a 4-kB memory space allocated in the system CPU address
space.
The addresses of the most frequently-used registers in the different peripherals are aliased down to the
lower 256 words (512 bytes) in the AUX memory space, which can only be accessed by the sensor
controller. Accessing an alias address improves the execution time of an instruction by one clock cycle,
compared to using the direct peripheral 16-bit address.
lower 256 words (512 bytes) in the AUX memory space, which can only be accessed by the sensor
controller. Accessing an alias address improves the execution time of an instruction by one clock cycle,
compared to using the direct peripheral 16-bit address.
shows the memory map of the AUX peripherals.
Table 17-1. Memory Map of AUX Peripherals
AUX Peripheral Instance
Description
Start Address
AUX_ARBITER (alias of frequently used
Arbitrator
(1)
0x 400C 0000
registers)
AUX_AIODIOCTRL0
IO Bank 0
0x 400C 1000
AUX_AIODIOCTRL1
IO Bank 1
0x 400C 2000
AUX_TDC
Time-to-digital converter
0x 400C 4000
AUX_EVCTRL
Event control
0x 400C 5000
AUX_WUC
Wake-up control
0x 400C 6000
AUX_TIMER
Timers
0x 400C 7000
AUX_SEMAPH
Semaphore
0x 400C 8000
AUX_ANAIF
Analog control
0x 400C 9000
DDI_0_OSC
Oscillator interface
0x 400C A000
AUX_ADI
Analog interface
0x 400C B000
AUX_RAM
AUX SRAM
0x 400E 0000
AUX_SCE
Sensor controller engine control and
0x 400E 1000
status
(2)
(1)
Only accessible for Sensor Controller.
(2)
Only accessible for system CPU.
17.2.1 Alias of Commonly Used Registers
defines the mapping for the sensor controller to use direct I/O access to selected registers in
the peripherals.
Table 17-2. Register Mapping
Register bank
Register name
Original address
Alias address
AUX_ANAIF
ADCCTL
0x400C 9000+0x10
0
AUX_ANAIF
ADCFIFOSTAT
0x400C 9000+0x14
1
AUX_ANAIF
ADCFIFO
0x400C 9000+0x18
2
AUX_ANAIF
ADCTRIG
0x400C 0000+0x1C
3
AUX_TDCIF
CTL
0x400C 4000+0x00
4
AUX_TDCIF
STAT
0x400C 4000+0x04
5
AUX_TDCIF
RESULT (lowest 16 bits)
0x400C 4000+0x08
6
1189
SWCU117A – February 2015 – Revised March 2015
AUX – Sensor Controller with Digital and Analog Peripherals
Copyright © 2015, Texas Instruments Incorporated