Texas Instruments CC2650DK ユーザーズマニュアル
Modules
17.4.3 AUX Timers
17.4.4 Time-to-Digital Converter
The high-precision time-to-digital converter (TDC) peripheral measures time between two individually
selected start and stop events with high accuracy. The TDC counts on both clock edges, running
effectively up to a speed of 96 MHz. The TDC is controlled by a state machine running on the AUX_PD
system clock.
selected start and stop events with high accuracy. The TDC counts on both clock edges, running
effectively up to a speed of 96 MHz. The TDC is controlled by a state machine running on the AUX_PD
system clock.
Typical use cases for TDC are: as part of a system doing capacitive sensing, clock calibration, or pulse
counting.
counting.
17.4.4.1 Configuration
The TDC must be in idle mode to be configured; any register writes are ignored when not in idle mode.
The TDC starts up in idle, and will return to idle once a measurement is done or a measurement is
aborted.
The TDC starts up in idle, and will return to idle once a measurement is done or a measurement is
aborted.
17.4.4.2 Clocks
Before accessing the TDC module, the clock to the TDC interface must be enabled by writing to
[AUX_WUC:MODCLKEN0:TDC].
[AUX_WUC:MODCLKEN0:TDC].
The high-speed clock used to count must also be configured in
[DDI_0_OSC:CTL0:ACLK_TDC_SRC_SEL].
[DDI_0_OSC:CTL0:ACLK_TDC_SRC_SEL].
lists the available clock sources.
Table 17-17. Available Clock Sources
Clock source
Description
RCOSC_HF
48-MHz RCOSC
RCOSC_HF_D24M
24 MHz derived from RCOSC_HF
XOSC_HF_D24M
24 MHz derived from XOSC_HF
If the TDC is used to measure the frequency of another on-chip frequency oscillator, the correct low-
frequency source must be configured in [DDI_0_OSC:CTL0:ACLK_REF_SRC_SEL].
frequency source must be configured in [DDI_0_OSC:CTL0:ACLK_REF_SRC_SEL].
lists the
available reference clock sources.
Table 17-18. Available Reference Clock Sources
Clock source
Description
RCOSC_HF_DLF
Clock derived from 48-MHz RCOSC (31.25 kHz)
XOSC_HF_DLF
Clock derived from 2-4MHz XOSC (31.25 kHz)
RCOSC_LF
Clock from RCOSC_LF (32 kHz)
XOSC_LF
Clock from XOSC_LF (32.768 kHz)
Before using the TDC, the above-configured clock sources must be enabled by writing to
[AUX_WUC:TDCCLKCTL:REQ] and [AUX_WUC:REFCLKCTL:REQ]. The corresponding ACK bit is set
when the clock source has started and is ready to use.
[AUX_WUC:TDCCLKCTL:REQ] and [AUX_WUC:REFCLKCTL:REQ]. The corresponding ACK bit is set
when the clock source has started and is ready to use.
NOTE:
If there are any high-speed clocks enabled for the TDC, the system will not be able to go to
Standby mode, as the oscillator is still requesting resources from the supply system.
17.4.4.2.1 Start and Stop Source
A start and stop source must be configured for the TDC before doing a measurement, by configuring
[AUX_TDCIF:TRIGSRC]. It is also possible to configure the polarity of the start and stop sources, which
lets the TDC start or stop counting on the programmed edge.
[AUX_TDCIF:TRIGSRC]. It is also possible to configure the polarity of the start and stop sources, which
lets the TDC start or stop counting on the programmed edge.
1203
SWCU117A – February 2015 – Revised March 2015
AUX – Sensor Controller with Digital and Analog Peripherals
Copyright © 2015, Texas Instruments Incorporated