Texas Instruments CC2650DK ユーザーズマニュアル
Interrupts and Events Registers
4.6.2.10 CPUIRQSEL9 Register (Offset = 24h) [reset = X]
CPUIRQSEL9 is shown in
and described in
.
Output Selection for CPU Interrupt 9
Figure 4-19. CPUIRQSEL9 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EV
R-X
R-1Bh
Table 4-25. CPUIRQSEL9 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-7
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
6-0
EV
R
1Bh
Read only selection value
1Bh = Combined Interrupt for CPE Generated events.
Corresponding flags are here RFC_DBELL:RFCPEIFG. Only
interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger
a RFC_CPE_0 event
Corresponding flags are here RFC_DBELL:RFCPEIFG. Only
interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger
a RFC_CPE_0 event
282
Interrupts and Events
SWCU117A – February 2015 – Revised March 2015
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