Texas Instruments CC2650DK ユーザーズマニュアル
PRCM Registers
6.2.3.1
MCUCLK Register (Offset = 0h) [reset = X]
MCUCLK is shown in
and described in
.
MCU Clock Management This register contains bitfields related to the MCU clock.
Figure 6-67. MCUCLK Register
31
30
29
28
27
26
25
24
RESERVED
R-X
23
22
21
20
19
18
17
16
RESERVED
R-X
15
14
13
12
11
10
9
8
RESERVED
R-X
7
6
5
4
3
2
1
0
RESERVED
RCOSC_HF_C
PWR_DWN_SRC
AL_DONE
R-X
R/W-X
R/W-X
Table 6-71. MCUCLK Register Field Descriptions
Bit
Field
Type
Reset
Description
31-3
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
2
RCOSC_HF_CAL_DONE
R/W
X
MCU bootcode will set this bit when RCOSC_HF is calibrated. The
FLASH can not be used until this bit is set. 1: RCOSC_HF is
calibrated to 48 MHz, allowing FLASH to power up. 0: RCOSC_HF
is not yet calibrated, ie FLASH must not assume that the SCLK_HF
is safe
FLASH can not be used until this bit is set. 1: RCOSC_HF is
calibrated to 48 MHz, allowing FLASH to power up. 0: RCOSC_HF
is not yet calibrated, ie FLASH must not assume that the SCLK_HF
is safe
1-0
PWR_DWN_SRC
R/W
X
Controls the clock source for the entire MCU domain while MCU is
requesting powerdown. When MCU requests powerdown with
SCLK_HF as source, then WUC will switch over to this clock source
during powerdown, and automatically switch back to SCLK_HF when
MCU is no longer requesting powerdown and system is back in
active mode.
requesting powerdown. When MCU requests powerdown with
SCLK_HF as source, then WUC will switch over to this clock source
during powerdown, and automatically switch back to SCLK_HF when
MCU is no longer requesting powerdown and system is back in
active mode.
0h = No clock in Powerdown
1h = Use SCLK_LF in Powerdown
2h = 2
494
Power, Reset, and Clock Management
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated