Texas Instruments CC2650DK ユーザーズマニュアル
Cryptography Registers
10.2.1.31 AESTAGOUT_0 to AESTAGOUT_3 Register (Offset = 570h to 57Ch) [reset = X]
AESTAGOUT_0 to AESTAGOUT_3 is shown in
and described in
AES Tag Output
Figure 10-33. AESTAGOUT_0 to AESTAGOUT_3 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
TAG
R-X
Table 10-41. AESTAGOUT_0 to AESTAGOUT_3 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-0
TAG
R
X
This register contains the authentication TAG for the combined and
authentication-only modes.
authentication-only modes.
857
SWCU117A – February 2015 – Revised March 2015
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