Microchip Technology MCP23X17EV データシート
AN1043
DS01043A-page 4
© 2006 Microchip Technology Inc.
FIGURE 3:
INTERRUPT-ON-PIN-CHANGE EXAMPLE
FIGURE 4:
INTERRUPT-ON-CHANGE-FROM-DEFVAL EXAMPLE
GP3
INT
SPI
Read INTCAP or GPIO
Change cause interrupt.
Port state captured in
INTCAP
Port state captured in
INTCAP
No affect on INT pin or
INTCAP
INTCAP
Interrupt cleared and
re-enabled
re-enabled
Change cause interrupt.
Port state captured in
INTCAP
Port state captured in
INTCAP
Read INTCAP or GPIO
Given:
- GP3 configured to “interrupt-on-pin-change”
- INT pin configured for “active low”
- GP3 configured to “interrupt-on-pin-change”
- INT pin configured for “active low”
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
INTCON – Interrupt Control Register
X
X
X
X
1
X
X
X
DEF7
DEF6
DEF5
DEF4
DEF3
DEF2
DEF1
DEF0
DEFVAL – Default Value Register
X
X
X
X
0
X
X
X
GPINTEN – GPIO Interrupt-on-Change Enable Register
X
X
X
X
1
X
X
X
GPINT7 GPINT6 GPINT5 GPINT4 GPINT3 GPINT2 GPINT1 GPINT0
Interrupt will occur if GP3 logic level = 1
INT
GP3
SPI
Read INTCAP or GPIO
Read INTCAP or GPIO
Change cause interrupt.
Port state captured in
INTCAP
Port state captured in
INTCAP
No affect on INT
pin or INTCAP
pin or INTCAP
INT remains
because GP3 = 1
(opposite of DEF3)
because GP3 = 1
(opposite of DEF3)
GP3 = DEF3
INT deactivates
after SPI read
INT deactivates
after SPI read