Microchip Technology MA240029 データシート
PIC24FJ128GA310 FAMILY
DS39996F-page 202
2010-2011 Microchip Technology Inc.
REGISTER 13-1:
TxCON: TIMER2 AND TIMER4 CONTROL REGISTER
(
R/W-0
U-0
R/W-0
U-0
U-0
U-0
U-0
U-0
TON
—
TSIDL
—
—
—
—
—
bit 15
bit 8
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
U-0
—
TGATE
TCKPS1
TCKPS0
T32
(
—
TCS
)
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TON:
Timerx On bit
When TxCON<3> = 1:
1
1
= Starts 32-bit Timerx/y
0
= Stops 32-bit Timerx/y
When TxCON<3> = 0:
1
1
= Starts 16-bit Timerx
0
= Stops 16-bit Timerx
bit 14
Unimplemented:
Read as ‘0’
bit 13
TSIDL:
Stop in Idle Mode bit
1
= Discontinue module operation when device enters Idle mode
0
= Continue module operation in Idle mode
bit 12-7
Unimplemented:
Read as ‘0’
bit 6
TGATE:
Timerx Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1
This bit is ignored.
When TCS = 0:
1
= Gated time accumulation is enabled
0
= Gated time accumulation is disabled
bit 5-4
TCKPS<1:0>:
Timerx Input Clock Prescale Select bits
11
= 1:256
10
= 1:64
01
= 1:8
00
= 1:1
bit 3
T32:
32-Bit Timer Mode Select bit
)
1
= Timerx and Timery form a single 32-bit timer
0
= Timerx and Timery act as two 16-bit timers
In 32-bit mode, T3CON control bits do not affect 32-bit timer operation.
bit 2
Unimplemented:
Read as ‘0’
bit 1
TCS:
Timerx Clock Source Select bit
1
= External clock is from pin, TxCK (on the rising edge)
0
= Internal clock (F
OSC
/2)
bit 0
Unimplemented:
Read as ‘0’
Note 1:
In T4CON, the T45 bit is implemented instead of T32 to select 32-bit mode. In 32-bit mode, the T3CON or
T5CON control bits do not affect 32-bit timer operation.
T5CON control bits do not affect 32-bit timer operation.
2:
If TCS = 1, RPINRx (TxCK) must be configured to an available RPn/RPIn pin. For more information, see
.
3:
Changing the value of TxCON while the timer is running (TON = 1) causes the timer prescale counter to
reset and is not recommended.
reset and is not recommended.