Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 239
PIC24FJ128GA310 FAMILY
bit 4
P:
Stop bit
1
= Indicates that a Stop bit has been detected last
0
= Stop bit was not detected last
Hardware is set or clear when Start, Repeated Start or Stop is detected.
bit 3
S:
Start bit
1
= Indicates that a Start (or Repeated Start) bit has been detected last
0
= Start bit was not detected last
Hardware is set or clear when Start, Repeated Start or Stop is detected.
bit 2
R/W:
Read/Write Information bit (when operating as I
2
C slave)
1
= Read: Indicates the data transfer is output from the slave
0
= Write: Indicates the data transfer is input to the slave
Hardware is set or clear after the reception of an I
2
C device address byte.
bit 1
RBF:
Receive Buffer Full Status bit
1
= Receive is complete, I2CxRCV is full
0
= Receive is not complete, I2CxRCV is empty
Hardware is set when I2CxRCV is written with the received byte; hardware is clear when the software
reads I2CxRCV.
reads I2CxRCV.
bit 0
TBF:
Transmit Buffer Full Status bit
1
= Transmit is in progress, I2CxTRN is full
0
= Transmit is complete, I2CxTRN is empty
Hardware is set when software writes to I2CxTRN; hardware is clear at the completion of data transmission.
REGISTER 17-2:
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)
REGISTER 17-3:
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
—
—
—
AMSK9
AMSK8
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
AMSK7
AMSK6
AMSK5
AMSK4
AMSK3
AMSK2
AMSK1
AMSK0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-10
Unimplemented:
Read as ‘0’
bit 9-0
AMSK<9:0>:
Mask for Address Bit x Select bits
1
= Enables masking for bit x of the incoming message address; bit match is not required in this position
0
= Disables masking for bit x; bit match is required in this position