Microchip Technology MA240029 データシート
PIC24FJ128GA310 FAMILY
DS39996F-page 310
2010-2011 Microchip Technology Inc.
REGISTER 24-12: AD1CTMENH: CTMU ENABLE REGISTER (HIGH WORD)
(
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
CTMEN30
CTMEN29
CTMEN28
CTMEN27
CTMEN26
CTMEN25
CTMEN24
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CTMEN23
CTMEN22
CTMEN21
CTMEN20
CTMEN19
CTMEN18
CTMEN17
CTMEN16
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
CTMEN<31:16>:
CTMU Enabled During Conversion bits
1
= CTMU is enabled and connected to the selected channel during conversion
0
= CTMU is not connected to this channel
Note 1:
The actual number of channels available depends on which channels are implemented on a specific
device; refer to the device data sheet for details. Unimplemented channels are read as ‘0’.
device; refer to the device data sheet for details. Unimplemented channels are read as ‘0’.
REGISTER 24-13: AD1CTMENL: CTMU ENABLE REGISTER (LOW WORD)
)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CTMEN15
CTMEN14
CTMEN13
CTMEN12
CTMUEN11
CTMEN10
CTMEN9
CTMEN8
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CTMEN7
CTMEN6
CTMEN5
CTMEN4
CTMEN3
CTMEN2
CTMEN1
CTMEN0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
CTMEN<15:0>:
CTMU Enabled During Conversion bits
1
= CTMU is enabled and connected to the selected channel during conversion
0
= CTMU is not connected to this channel
Note 1:
The actual number of channels available depends on which channels are implemented on a specific
device; refer to the device data sheet for details. Unimplemented channels are read as ‘0’.
device; refer to the device data sheet for details. Unimplemented channels are read as ‘0’.