Microchip Technology MA240029 データシート

DS39996F-page 318

 2010-2011 Microchip Technology Inc.

  

R/W-0

R/W-0

R/W-0

U-0

U-0

U-0

R/W-0, HS

R-0, HSC

CEN

COE

CPOL

—

—

—

CEVT

COUT

bit 15

bit 8

R/W-0

R/W-0

U-0

R/W-0

U-0

U-0

R/W-0

R/W-0

EVPOL1

EVPOL0

—

CREF

—

—

CCH1

CCH0

bit 7

bit 0

HS = Hardware Settable bit

HSC = Hardware Settable/Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

 Comparator Enable bit

1

 = Comparator is enabled

0

 = Comparator is disabled

bit 14

 Comparator Output Enable bit

1

 = Comparator output is present on the CxOUT pin

0

 = Comparator output is internal only

bit 13

 Comparator Output Polarity Select bit

1

 = Comparator output is inverted

0

 = Comparator output is not inverted

bit 12-10

 Read as ‘0’ 

bit 9

 Comparator Event bit

1

 = Comparator event that is defined by EVPOL<1:0> has occurred; subsequent triggers and interrupts

are disabled until the bit is cleared

0

 = Comparator event has not occurred

bit 8

 Comparator Output bit

When CPOL = 0:
1

  = V

IN

+ > V

IN

-

0

  = V

IN

+ < V

IN

-

When CPOL = 1:
1

  = V

IN

+ < V

IN

-

0

  = V

IN

+ > V

IN

-

bit 7-6

 Trigger/Event/Interrupt Polarity Select bits

11

 = Trigger/event/interrupt is generated on any change of the comparator output (while CEVT = 0)

10

 = Trigger/event/interrupt is generated on transition of the comparator output:

If CPOL = 0 (non-inverted polarity):
High-to-low transition only.
If CPOL = 1 (inverted polarity):
Low-to-high transition only.

01

 = Trigger/event/interrupt is generated on transition of comparator output:

If CPOL = 0 (non-inverted polarity):
Low-to-high transition only.
If CPOL = 1 (inverted polarity):
High-to-low transition only.

00

 = Trigger/event/interrupt generation is disabled

bit 5

 Read as ‘0’