Microchip Technology MA240029 データシート
2010-2
011 M
ic
rochip
T
e
chnology
In
c.
DS
39996F
39996F
-page 63
PIC24FJ128GA310 FAMILY
RPOR0
06C0
—
—
RP1R5
RP1R4
RP1R3
RP1R2
RP1R1
RP1R0
—
—
RP0R5
RP0R4
RP0R3
RP0R2
RP0R1
RP0R0
0000
RPOR1
06C2
—
—
RP3R5
RP3R4
RP3R3
RP3R2
RP3R1
RP3R0
—
—
RP2R5
RP2R4
RP2R3
RP2R2
RP2R1
RP2R0
0000
RPOR2
06C4
—
—
RP5R5
RP5R4
)
RP5R3
)
RP5R2
)
RP5R1
RP5R0
—
—
RP4R5
RP4R4
RP4R3
RP4R2
RP4R1
RP4R0
0000
RPOR3
06C6
—
—
RP7R5
RP7R4
RP7R3
RP7R2
RP7R1
RP7R0
—
—
RP6R5
RP6R4
RP6R3
RP6R2
RP6R1
RP6R0
0000
RPOR4
06C8
—
—
RP9R5
RP9R4
RP9R3
RP9R2
RP9R1
RP9R0
—
—
RP8R5
RP8R4
RP8R3
RP8R2
RP8R1
RP8R0
0000
RPOR5
06CA
—
—
RP11R5
RP11R4
RP11R3
RP11R2
RP11R1
RP11R0
—
—
RP10R5
RP10R4
RP10R3
RP10R2
RP10R1
RP10R0
0000
RPOR6
06CC
—
—
RP13R5
RP13R4
RP13R3
RP13R2
RP13R1
RP13R0
—
—
RP12R5
RP12R4
RP12R3
RP12R2
RP12R1
RP12R0
0000
RPOR7
06CE
—
—
RP15R5
RP15R4
RP15R3
(
)
RP15R2
(
)
RP15R1
RP15R0
—
—
RP14R5
RP14R4
RP14R3
RP14R2
RP14R1
RP14R0
0000
RPOR8
06D0
—
—
RP17R5
RP17R4
RP17R3
RP17R2
RP17R1
RP17R0
—
—
RP16R5
RP16R4
RP16R3
RP16R2
RP16R1
RP16R0
0000
RPOR9
06D2
—
—
RP19R5
RP19R4
RP19R3
RP19R2
RP19R1
RP19R0
—
—
RP18R5
RP18R4
RP18R3
RP18R2
RP18R1
RP18R0
0000
RPOR10
06D4
—
—
RP21R5
RP21R4
RP21R3
RP21R2
RP21R1
RP21R0
—
—
RP20R5
RP20R4
RP20R3
RP20R2
RP20R1
RP20R0
0000
RPOR11
06D6
—
—
RP23R5
RP23R4
RP23R3
RP23R2
RP23R1
RP23R0
—
—
RP22R5
RP22R4
RP22R3
RP22R2
RP22R1
RP22R0
0000
RPOR12
06D8
—
—
RP25R5
RP25R4
RP25R3
RP25R2
RP25R1
RP25R0
—
—
RP24R5
RP24R4
RP24R3
RP24R2
RP24R1
RP24R0
0000
RPOR13
06DA
—
—
RP27R5
RP27R4
RP27R3
RP27R2
RP27R1
RP27R0
—
—
RP26R5
RP26R4
RP26R3
RP26R2
RP26R1
RP26R0
0000
RPOR14
06DC
—
—
RP29R5
RP29R4
RP29R3
RP29R2
RP29R1
RP29R0
—
—
RP28R5
RP28R4
RP28R3
RP28R2
RP28R1
RP28R0
0000
RPOR15
06DE
—
—
RP31R5
RP31R4
RP31R3
(
)
RP31R2
(
)
RP31R1
RP31R0
—
—
RP30R5
RP30R4
RP30R3
RP30R2
RP30R1
RP30R0
0000
TABLE 4-30:
PERIPHERAL PIN SELECT REGISTER MAP (CONTINUED)
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
These bits are unimplemented in 64-pin devices, read as ‘0’.
2:
These bits are unimplemented in 64-pin and 80-pin devices, read as ‘0’.
TABLE 4-31:
SYSTEM CONTROL (CLOCK AND RESET) REGISTER MAP
File Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
RCON
0740
TRAPR
IOPUWR
—
RETEN
—
DPSLP
CM
VREGS
EXTR
SWR
SWDTEN
WDTO
SLEEP
IDLE
BOR
POR
OSCCON
0742
—
COSC2
COSC1
COSC0
—
NOSC2
NOSC1
NOSC0
CLKLOCK IOLOCK
LOCK
—
CF
CLKDIV
0744
ROI
DOZE2
DOZE1
DOZE0
DOZEN
RCDIV2
RCDIV1
RCDIV0
—
—
—
—
—
—
—
—
3100
OSCTUN
0748
—
—
—
—
—
—
—
—
—
—
TUN5
TUN4
TUN3
TUN2
TUN1
TUN0
0000
REFOCON 074E
ROEN
—
ROSSLP
ROSEL
RODIV3
RODIV2
RODIV1
RODIV0
—
—
—
—
—
—
—
—
0000
LVDCON
0756
LVDEN
—
LSIDL
—
—
—
—
—
DIR
BGVST
IRVST
—
LVDL3
LVDL2
LVDL1
LVDL0
0000
RCON2
0762
—
—
—
—
—
—
—
—
—
—
—
r
VDDBOR VDDPOR
VBPOR
VBAT
Legend:
— = unimplemented, read as ‘0’; r = reserved. Reset values are shown in hexadecimal.
Note 1:
The Reset value of the RCON register is dependent on the type of Reset event. See
for more information.
2:
The Reset value of the OSCCON register is dependent on both the type of Reset event and the device configuration. See
for more information.