Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 79
PIC24FJ128GA310 FAMILY
REGISTER 5-1:
DMACON: DMA ENGINE CONTROL REGISTER
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
DMAEN
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
—
PRSSEL
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
DMAEN:
DMA Module Enable bit
1
= Enables module
0
= Disables module and terminates all active DMA operation(s)
bit 14-1
Unimplemented:
Read as ‘0’
bit 0
PRSSEL:
Channel Priority Scheme Selection bit
1
= Round-robin scheme
0
= Fixed priority scheme