Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 85
PIC24FJ128GA310 FAMILY
REGISTER 6-1:
NVMCON: FLASH MEMORY CONTROL REGISTER
R/S-0, HC
R/W-0
(
)
R-0, HSC
(
U-0
U-0
U-0
U-0
U-0
WR
WREN
WRERR
—
—
—
—
—
bit 15
bit 8
U-0
R/W-0
(
)
U-0
U-0
R/W-0
R/W-0
(
)
R/W-0
(
)
R/W-0
)
—
ERASE
—
—
NVMOP3
(
)
NVMOP2
(
)
NVMOP1
)
NVMOP0
bit 7
bit 0
Legend:
S = Settable bit
HC = Hardware Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
HSC = Hardware Settable/Clearable bit
bit 15
WR:
Write Control bit
(
)
1
= Initiates a Flash memory program or erase operation; the operation is self-timed and the bit is
cleared by hardware once the operation is complete
0
= Program or erase operation is complete and inactive
bit 14
WREN:
Write Enable bit
1
= Enable Flash program/erase operations
0
= Inhibit Flash program/erase operations
bit 13
WRERR:
Write Sequence Error Flag bit
)
1
= An improper program or erase sequence attempt or termination has occurred (bit is set
automatically on any set attempt of the WR bit)
0
= The program or erase operation completed normally
bit 12-7
Unimplemented:
Read as ‘0’
bit 6
ERASE:
Erase/Program Enable bit
(
1
= Perform the erase operation specified by NVMOP<3:0> on the next WR command
0
= Perform the program operation specified by NVMOP<3:0> on the next WR command
bit 5-4
Unimplemented:
Read as ‘0’
bit 3-0
NVMOP<3:0>:
NVM Operation Select bits
,
)
1111
= Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)
(
0011
= Memory word program operation (ERASE = 0) or no operation (ERASE = 1)
0010
= Memory page erase operation (ERASE = 1) or no operation (ERASE = 0)
0001
= Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
Note 1:
These bits can only be reset on a Power-on Reset.
2:
All other combinations of NVMOP<3:0> are unimplemented.
3:
Available in ICSP™ mode only; refer to the device programming specification.