Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート
製品コード
AT91SAM9M10-G45-EK
983
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
42.5
Product Dependencies
42.5.1
I/O Lines
The pins used for interfacing the PWM may be multiplexed with PIO lines. The programmer must first program the
PIO controller to assign the desired PWM pins to their peripheral function. If I/O lines of the PWM are not used by
the application, they can be used for other purposes by the PIO controller.
PIO controller to assign the desired PWM pins to their peripheral function. If I/O lines of the PWM are not used by
the application, they can be used for other purposes by the PIO controller.
All of the PWM outputs may or may not be enabled. If an application requires only four channels, then only four
PIO lines will be assigned to PWM outputs.
PIO lines will be assigned to PWM outputs.
42.5.2
Power Management
The PWM is not continuously clocked. The programmer must first enable the PWM clock in the Power Manage-
ment Controller (PMC) before using the PWM. However, if the application does not require PWM operations, the
PWM clock can be stopped when not needed and be restarted later. In this case, the PWM will resume its opera-
tions where it left off.
ment Controller (PMC) before using the PWM. However, if the application does not require PWM operations, the
PWM clock can be stopped when not needed and be restarted later. In this case, the PWM will resume its opera-
tions where it left off.
Configuring the PWM does not require the PWM clock to be enabled.
42.5.3
Interrupt Sources
The PWM interrupt line is connected on one of the internal sources of the Advanced Interrupt Controller. Using the
PWM interrupt requires the AIC to be programmed first. Note that it is not recommended to use the PWM interrupt
line in edge sensitive mode.
PWM interrupt requires the AIC to be programmed first. Note that it is not recommended to use the PWM interrupt
line in edge sensitive mode.
42.6
Functional Description
The PWM macrocell is primarily composed of a clock generator module and
4
channels.
– Clocked by the system clock, MCK, the clock generator module provides 13 clocks.
– Each channel can independently choose one of the clock generator outputs.
– Each channel generates an output waveform with attributes that can be defined independently for each
channel through the user interface registers.
Table 42-2.
I/O Lines
Instance
Signal
I/O Line
Peripheral
PWM
PWM0
PD24
B
PWM
PWM1
PD25
B
PWM
PWM1
PD31
B
PWM
PWM2
PD26
B
PWM
PWM2
PE31
A
PWM
PWM3
PA25
B
PWM
PWM3
PD0
B
Table 42-3.
Peripheral IDs
Instance
ID
PWM
19