Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD データシート
製品コード
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
90
QSUB
{Rd,} Rn, Rm
Saturating Subtract
Q
QSUB16
{Rd,} Rn, Rm
Saturating Subtract 16
–
QSUB8
{Rd,} Rn, Rm
Saturating Subtract 8
–
RBIT
Rd, Rn
Reverse Bits
–
REV
Rd, Rn
Reverse byte order in a word
–
REV16
Rd, Rn
Reverse byte order in each halfword
–
REVSH
Rd, Rn
Reverse byte order in bottom halfword and sign extend
–
ROR, RORS
Rd, Rm, <Rs|#n>
Rotate Right
N,Z,C
RRX, RRXS
Rd, Rm
Rotate Right with Extend
N,Z,C
RSB, RSBS
{Rd,} Rn, Op2
Reverse Subtract
N,Z,C,V
SADD16
{Rd,} Rn, Rm
Signed Add 16
GE
SADD8
{Rd,} Rn, Rm
Signed Add 8 and Subtract with Exchange
GE
SASX
{Rd,} Rn, Rm
Signed Add
GE
SBC, SBCS
{Rd,} Rn, Op2
Subtract with Carry
N,Z,C,V
SBFX
Rd, Rn, #lsb, #width
Signed Bit Field Extract
–
SDIV
{Rd,} Rn, Rm
Signed Divide
–
SEL
{Rd,} Rn, Rm
Select bytes
–
SEV
–
Send Event
–
SHADD16
{Rd,} Rn, Rm
Signed Halving Add 16
–
SHADD8
{Rd,} Rn, Rm
Signed Halving Add 8
–
SHASX
{Rd,} Rn, Rm
Signed Halving Add and Subtract with Exchange
–
SHSAX
{Rd,} Rn, Rm
Signed Halving Subtract and Add with Exchange
–
SHSUB16
{Rd,} Rn, Rm
Signed Halving Subtract 16
–
SHSUB8
{Rd,} Rn, Rm
Signed Halving Subtract 8
–
SMLABB, SMLABT,
SMLATB, SMLATT
Rd, Rn, Rm, Ra
Signed Multiply Accumulate Long (halfwords)
Q
SMLAD, SMLADX
Rd, Rn, Rm, Ra
Signed Multiply Accumulate Dual
Q
SMLAL
RdLo, RdHi, Rn, Rm
Signed Multiply with Accumulate (32 × 32 + 64), 64-bit result
–
SMLALBB, SMLALBT,
SMLALTB, SMLALTT
RdLo, RdHi, Rn, Rm
Signed Multiply Accumulate Long, halfwords
–
SMLALD, SMLALDX
RdLo, RdHi, Rn, Rm
Signed Multiply Accumulate Long Dual
–
SMLAWB, SMLAWT
Rd, Rn, Rm, Ra
Signed Multiply Accumulate, word by halfword
Q
SMLSD
Rd, Rn, Rm, Ra
Signed Multiply Subtract Dual
Q
SMLSLD
RdLo, RdHi, Rn, Rm
Signed Multiply Subtract Long Dual
SMMLA
Rd, Rn, Rm, Ra
Signed Most significant word Multiply Accumulate
–
SMMLS, SMMLR
Rd, Rn, Rm, Ra
Signed Most significant word Multiply Subtract
–
SMMUL, SMMULR
{Rd,} Rn, Rm
Signed Most significant word Multiply
–
SMUAD
{Rd,} Rn, Rm
Signed dual Multiply Add
Q
Table 12-13.
Cortex-M4 Instructions (Continued)
Mnemonic
Operands
Description
Flags