Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート
製品コード
AT32UC3A3-XPLD
348
32072H–AVR32–10/2012
AT32UC3A3
19.12 User Interface
Table 19-2.
DMA Controller Memory Map
Offset
Register
Register Name
Access
Reset Value
0x000
Channel 0 Source Address Register
SAR0
Read/Write
0x00000000
0x008
Channel 0 Destination Address Register
DAR0
Read/Write
0x00000000
0x010
Channel 0 Linked List Pointer Register
LLP0
Read/Write
0x00000000
0x018
Channel 0 Control Register Low
CTL0L
Read/Write
0x00304801
0x01C
Channel 0 Control Register High
CTL0H
Read/Write
0x00000002
0x040
Channel 0 Configuration Register Low
CFG0L
Read/Write
0x00000c00
0x044
Channel 0 Configuration Register High
CFG0H
Read/Write
0x00000004
0x048
Channel 0 Source Gather Register
SGR0
Read/Write
0x00000000
0x050
Channel 0 Destination Scatter Register
DSR0
Read/Write
0x00000000
0x058
Channel 1 Source Address Register
SAR1
Read/Write
0x00000000
0x060
Channel 1 Destination Address Register
DAR1
Read/Write
0x00000000
0x068
Channel 1 Linked List Pointer Register
LLP1
Read/Write
0x00000000
0x070
Channel 1 Control Register Low
CTL1L
Read/Write
0x00304801
0x074
Channel 1 Control Register High
CTL1H
Read/Write
0x00000002
0x098
Channel 1 Configuration Register Low
CFG1L
Read/Write
0x00000c20
0x09C
Channel 1 Configuration Register High
CFG1H
Read/Write
0x00000004
0x0A0
Channel 1Source Gather Register
SGR1
Read/Write
0x00000000
0x0A8
Channel 1 Destination Scatter Register
DSR1
Read/Write
0x00000000
0x0B0
Channel 2 Source Address Register
SAR2
Read/Write
0x00000000
0x0B8
Channel 2 Destination Address Register
DAR2
Read/Write
0x00000000
0x0C0
Channel 2 Linked List Pointer Register
LLP2
Read/Write
0x00000000
0x0C8
Channel 2 Control Register Low
CTL2L
Read/Write
0x00304801
0x0CC
Channel 2 Control Register High
CTL2H
Read/Write
0x00000002
0x0F0
Channel 2 Configuration Register Low
CFG2L
Read/Write
0x00000c40
0x0F4
Channel 2 Configuration Register High
CFG2H
Read/Write
0x00000004
0x0F8
Channel 2 Source Gather Register
SGR2
Read/Write
0x00000000
0x100
Channel 2 Destination Scatter Register
DSR2
Read/Write
0x00000000
0x108
Channel 3 Source Address Register
SAR3
Read/Write
0x00000000
0x110
Channel 3 Destination Address Register
DAR3
Read/Write
0x00000000
0x118
Channel 3 Linked List Pointer Register
LLP3
Read/Write
0x00000000
0x120
Channel 3 Control Register Low
CTL3L
Read/Write
0x00304801
0x124
Channel 3 Control Register High
CTL3H
Read/Write
0x00000002
0x148
Channel 3 Configuration Register Low
CFG3L
Read/Write
0x00000c60
0x14c
Channel 3 Configuration Register High
CFG3H
Read/Write
0x00000004
0x150
Channel 3 Source Gather Register
SGR3
Read/Write
0x00000000