Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート
製品コード
AT32UC3A3-XPLD
358
32072H–AVR32–10/2012
AT32UC3A3
19.12.6
Configuration Register for Channel x Low
Name: CFGxL
Access Type: Read/Write
Offset:
0x040 + [x * 0x58]
• Reset Value: 0x00000C00 + [x * 0x20]
•
RELOAD_DST: Automatic Destination Reload
The DARx register can be automatically reloaded from its initial value at the end of every block for multi-block transfers. A
new block transfer is then initiated.
new block transfer is then initiated.
• RELOAD_SRC: Automatic Source Reload
The SARx register can be automatically reloaded from its initial value at the end of every block for multi-block transfers. A
new block transfer is then initiated.
new block transfer is then initiated.
• SRC_HS_POL: Source Handshaking Interface Polarity
0 = Active high
1 = Active low
• DST_HS_POL: Destination Handshaking Interface Polarity
0 = Active high
1 = Active low
• HS_SEL_SRC: Source Software or Hardware Handshaking Select
This register selects which of the handshaking interfaces, hardware or software, is active for source requests on this
channel.
channel.
0 = Hardware handshaking interface. Software-initiated transaction requests are ignored.
1 = Software handshaking interface. Hardware-initiated transaction requests are ignored.
If the source peripheral is memory, then this bit is ignored.
• HS_SEL_DST: Destination Software or Hardware Handshaking Select
This register selects which of the handshaking interfaces, hardware or software, is active for destination requests on this
channel.
channel.
31
30
29
28
27
26
25
24
RELOAD_D
ST
RELOAD_S
RC
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
SRC_HS_P
OL
DST_HS_PO
L
-
-
15
14
13
12
11
10
9
8
-
-
HS_SEL_SR
C
HS_SEL_DS
T
FIFO_EMPT
Y
CH_SUSP
7
6
5
4
3
2
1
0
CH_PRIOR
-
-
-
-
-