Intel i3-2328M FF8062701275100 データシート
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製品コード
FF8062701275100
Signal Description
80
Datasheet, Volume 1
6.6
Intel
®
Flexible Display Interface (Intel
®
FDI)
Signals
6.7
Direct Media Interface (DMI) Signals
6.8
Phase Lock Loop (PLL) Signals
Table 6-8.
Intel
®
Flexible Display Interface (Intel
®
FDI)
Signal Name
Description
Direction/
Buffer Type
FDI0_TX[3:0]
FDI0_TX#[3:0]
Intel
®
Flexible Display Interface Transmit Differential Pair –
Pipe A
O
FDI
FDI0_FSYNC[0]
Intel
®
Flexible Display Interface Frame Sync – Pipe A
I
CMOS
FDI0_LSYNC[0]
Intel
®
Flexible Display Interface Line Sync – Pipe A
I
CMOS
FDI1_TX[3:0]
FD1I_TX#[3:0]
Intel
®
Flexible Display Interface Transmit Differential Pair –
Pipe B
O
FDI
FDI1_FSYNC[1]
Intel
®
Flexible Display Interface Frame Sync – Pipe B
I
CMOS
FDI1_LSYNC[1]
Intel
®
Flexible Display Interface Line Sync – Pipe B
I
CMOS
FDI_INT
Intel
®
Flexible Display Interface Hot Plug Interrupt
I
Asynchronous
CMOS
Table 6-9.
Direct Media Interface (DMI) Signals – Processor to PCH Serial Interface
Signal Name
Description
Direction/
Buffer Type
DMI_RX[3:0]
DMI_RX#[3:0]
DMI Input from PCH: Direct Media Interface receive differential pair.
I
DMI
DMI_TX[3:0]
DMI_TX#[3:0]
DMI Output to PCH: Direct Media Interface transmit differential pair.
O
DMI
Table 6-10. Phase Lock Loop (PLL) Signals
Signal Name
Description
Direction/
Buffer Type
BCLK
BCLK#
Differential bus clock input to the processor
I
Diff Clk
DPLL_REF_CLK
DPLL_REF_CLK#
Embedded Display Port PLL Differential Clock In: 120 MHz.
I
Diff Clk