Renesas R61509V ユーザーズマニュアル
R61509V
Target
Spec
Rev. 0.11 April 25, 2008, page 75 of 181
RAM Access
RAM Address Set (Horizontal Address) (R200h)
RAM Address Set (Vertical Address) (R201h)
RAM Address Set (Vertical Address) (R201h)
AD[16:0]: Sets a GRAM address in the AC (Address Counter) which is automatically updated according to
the combination of AM, ID[1:0] settings as the R61509V writes data to the internal GRAM. Data can be
written consecutively without resetting the address in the AC. The address is not automatically updated
after reading data from the internal GRAM.
the combination of AM, ID[1:0] settings as the R61509V writes data to the internal GRAM. Data can be
written consecutively without resetting the address in the AC. The address is not automatically updated
after reading data from the internal GRAM.
Note 1: In RGB interface operation (RM = “1”), the address AD16-0 is set in the address counter every
frame on the falling edge of VSYNCX.
Note 2: In internal clock operation and VSYNC interface operation (RM = “0”), the address AD16-0 is set
when executing the instruction.
Table 47 GRAM Address setting range
AD[16:0]
GRAM Data Setting
17’h00000 – 17’h000EF
Bitmap data on the first line
17’h00100 – 17’h001EF
Bitmap data on the second line
17’h00200 – 17’h002EF
Bitmap data on the third line
17’h00300 – 17’h003EF
Bitmap data on the fourth line
17’h00400 – 17’h004EF
Bitmap data on the fifth line
: :
17’h1AC00 – 17’h1ACEF Bitmap data on the 429
th
line
17’h1AD00 – 17’h1ADEF Bitmap data on the 430
th
line
17’h1AE00 – 17’h1AEEF
Bitmap data on the 431
st
line
17’h1AF00 – 17’h1AFEF
Bitmap data on the 432
nd
line
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9
IB8
IB7
IB6
IB5
IB4
IB3 IB2 IB1 IB0
R
200
R/W
1 0 0 0 0 0 0 0 0
AD
[7]
AD
[6]
AD
[5]
AD
[4]
AD
[3]
AD
[2]
AD
[1]
AD
[0]
Default
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R
201
R/W
1 0 0 0 0 0 0 0
AD
[16]
AD
[15]
AD
[14]
AD
[13]
AD
[12]
AD
[11]
AD
[10]
AD
[9]
AD
[8]
Default
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0