Oracle Vacuum Cleaner CPU-56T ユーザーズマニュアル

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PCI Bus B
Devices’ Features and Data Paths
SPARC/CPU−56T
79
PCI Bus B
PCI bus B runs at 33 MHz and is 64 bit wide. It is the secondary PCI bus of the CPU board
and has the following devices attached to it:
S Ethernet controller
a
S Southbridge
S PCIO−2 controller
S PMC module
Ethernet Controller
The Ethernet controller used at PCI bus B is the same as is used at PCI bus A.
a
Southbridge
The used Southbridge is an ALI M1535D+. It provides the following interfaces:
S Two IDE channels with ATA−100
S Parallel interface
S Floppy disk interface
S PS/2 keyboard/mouse interface
S SUN keyboard/mouse interface via two serial interfaces
PCIO−2 Controller
The used PCIO−2 controller is a SUN SME2300. It is a single−chip I/O subsystem using a
single PCI load and providing the following interfaces:
S Expansion bus (EBus) interface
S Four USB interfaces
S Media Independent Interface (MII)
EBus Interface
The PCIO−2 controller acts as EBus controller of the attached EBus. A description of all
devices attached to the EBus is given below.
a