Delta Tau GEO BRICK LV 参照マニュアル
Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Memory and I/O Map
549
(Shifted out MSB first one bit per DAC_CLK cycle, starting on rising
edge of phase clock; appears on SEL0 if in dedicated mode)
X:$07841C Supplementary PWM, PFM, MaxPhase* Control Word
Bits:
0-7:
PWM* Dead Time (16*PWM* CLK cycles) (I6804)
also PFM* pulse width (PFM* CLK cycles)
8-23:
PWM* Max Count Value (I6800)
PWM* Frequency = 117.96MHz / [2*(MaxCount+1)]
"MaxPhase*" Frequency = 2*PWM* Frequency
Chan #
1*
2*
Address
$078415
$07841D
Y:$07841x Supplementary Channel n* ADC A Input Value (uses SEL2 in dedicated mode)
Bits:
6-23: Serial ADC Value
0-5:
Not used
X:$07841x Supplementary Channel n* (Handwheel n) Control Word
(Bits 0-3 form I68n0)
Bits
0-1:
Encoder Decode Control
00: Pulse and direction decode
01: x1 quadrature decode
10: x2 quadrature decode
11: x4 quadrature decode
2-3:
Direction & Timer Control
00: Standard timer control, external signal source, no inversion
01: Standard timer control, external signal source, invert direction
10: Standard timer control, internal PFM source, no inversion
11: Alternate timer control, external signal source
(Bits 4-7 form I68n2)
4-5:
Position Capture Control
00: Software capture (by setting bit 6)
01: Use encoder index alone
10: Use capture flag alone
11: Use encoder index and capture flag
6:
Index Capture Invert Control (0=no inversion, 1=inversion)
7:
Flag Capture Invert Control (0=no inversion, 1=inversion)
8-9:
Capture Flag Select Control (I68n3)
00: Home Flag (HMFLn*)
01: Positive Limit (PLIMn*)
10: Negative Limit (MLIMn*)
11: User Flag (USERn*)
10:
Encoder Counter Reset Control (1=reset)
11:
Position Compare Initial State Write Enable
12:
Position Compare Initial State Value
13:
Position Compare Channel Select (I68n1)
(0= use this channel's encoder; 1=use first encoder on IC)
14:
AENAn* output value
15:
Gated Index Select for Position Capture (I68n4)
(0=ungated index, 1=gated index)
16:
Invert AB for Gated Index (I68n5)
(0: Gated Signal=A&B&C; 1: Gated Signal=A/&B/&C)
17:
De-multiplex Index Channel Control