Patton electronic SmartNode 4110 Series ユーザーズマニュアル
Introduction
206
SmartWare Software Configuration Guide
17 • BRI port configuration
Introduction
This chapter provides an overview of the BRI (Basic Rate Interface) ports, their characteristics and the tasks
involved in the configuration. A BRI port supports two 64kbit/s B-channels for switched voice or data connec-
tions, one 16kbit/s D-channel for signaling and always-on data transfer. This results a usable data bit rate of
144kBit/s.
involved in the configuration. A BRI port supports two 64kbit/s B-channels for switched voice or data connec-
tions, one 16kbit/s D-channel for signaling and always-on data transfer. This results a usable data bit rate of
144kBit/s.
BRI port configuration task list
This section describes the configuration tasks for the BRI port.
•
Enable/Disable BRI port
•
Configuring BRI clock mode
•
Configuring BRI Power-Feed
•
Configuring BRI encapsulation
•
BRI Debugging
Enable/Disable BRI port
By default, the BRI port is disabled. The following command is used for enabling or disabling it.
Mode: port bri <slot> <port>
Configuring BRI clock-mode
The BRI Port can either work in clock-master or in clock-slave mode. This setting defines the clock depen-
dency of the internal data processing. In clock-master mode the internal data processing is running on an inde-
pendent clock source. In clock-slave mode the clock source for internal data processing is recovered from the
receive line interface. Be aware that always a port-pair of clock-master and clock-slave are connected together.
In the other case the data transmission will fail due to bit failures. This command has also the option ‘auto’ that
can be used if the application running on the port is also of an asymmetric nature like master/slave, server/cli-
ent or user/net. Normally, the option ‘auto’ is used if the port is setup for ISDN. In this case, the clock mode
will automatically derived from the Q.921 protocol. If the UNI-Side (User-Network Interface) of Q.921 is set
to ‘net’, then clock mode of the port is automatically set to ‘master’ and in the other case to ‘slave’.
dency of the internal data processing. In clock-master mode the internal data processing is running on an inde-
pendent clock source. In clock-slave mode the clock source for internal data processing is recovered from the
receive line interface. Be aware that always a port-pair of clock-master and clock-slave are connected together.
In the other case the data transmission will fail due to bit failures. This command has also the option ‘auto’ that
can be used if the application running on the port is also of an asymmetric nature like master/slave, server/cli-
ent or user/net. Normally, the option ‘auto’ is used if the port is setup for ISDN. In this case, the clock mode
will automatically derived from the Q.921 protocol. If the UNI-Side (User-Network Interface) of Q.921 is set
to ‘net’, then clock mode of the port is automatically set to ‘master’ and in the other case to ‘slave’.
Mode: port bri <slot> <port>
Step
Command
Purpose
1
[name] (prt-bri)[slot/port]# [no] shutdown Enable/Disable the selected port.
Default: shutdown (which is disabled)
Step
Command
Purpose
1
[name] (prt-bri)[slot/port]# clock {auto |
master | slave}
master | slave}
Configures the clock-mode of the port.
Default: auto
Default: auto